Some GPIO ports activation where missing since not used
on available soc/boards.
Since stm32 family increases, activation of these ports
should be made available.
Jira: ZEP-1551
Change-Id: I612d135b28ef255bc771599e33796671ff81d0ac
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Currently, ARM Cortex-M image ROMs are linked starting at the flash
device's base address (CONFIG_FLASH_BASE_ADDRESS). This prevents XIP
Zephyr applications from being linked to run from elsewhere on the
flash device. Linking Zephyr applications to run from elsewhere can be
necessary when running under a bootloader (i.e., booting into a Zephyr
application from a bootloader, not using Zephyr as a bootloader).
To enable this use case, add a new config option: FLASH_LOAD_OFFSET.
This option directs the linker to treat ROM as if it started that many
bytes from the base of flash on Cortex-M targets. The option defaults
to zero to preserve backwards compatibility.
Change-Id: I64f82aee257c19c2451f9789b0ab56999775b761
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
In order to see who is freeing the fragment, add function
and line information to net_buf_frag_del() when net_buf
debugging is activated.
Change-Id: I732f579fab2390cb16804cb35b83f46e65fca342
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If IPv6 address is generated from IEEE 802.15.4 short address,
then the Universal/Local bit must be set to 0.
See RFC 6282 chapter 3.2.2 for details.
Change-Id: Ied38f40e807bdcd792570b331f6b99a6fcc7db1b
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
When we know the network interface where the packet is about
to be sent, then set the link address type too.
The link address type is used when working with IPv6 link
local and auto configured addresses.
Change-Id: If086c3c413c025809cffa64311f973bc7bdac7db
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The interface L2 address type is set at the same time as the
L2 address is set to the network interface. This is most
convinient place to set the address type.
Change-Id: I712d7357d075959eb79df3463141cfbc6d163a74
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
In order to know what kind of address the L2 link address is,
add a type of the address into struct net_linkaddr.
Change-Id: Icd4cb0374219583689cf9ee204c0840cad8559e9
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Some files made it through review process with full license header.
Change-Id: I2722b127c40b4b19500042c12e4fde85a165bae9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This section was renamed to kinetis_flash_config, but it slipped back in
with the previous section_tags.h cleanup.
Change-Id: I4a2558aa70379a75c604f3617483680a35ed3d90
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some arches may want to define this as an inline function, or
define in core arch code instead of timer driver code.
Unfortunately, this means we need to remove from the footprint
tests, but this is not typically a large function.
Issue: ZEP-1546
Change-Id: Ic0d7a33507da855995838f4703d872cd613a2ca2
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
To be API-equivalent with doubly-linked lists.
Change-Id: I98b781f4c649e248abb04f660f686ad76d6b39de
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
Like SYS_DLIST_FOR_EACH_NODE(), but __dn contains a node where to fetch
the next node from, NULL to start at the head.
Note that the function does not iterate from @a node, but from
node->next. This allows the following:
sys_dnode_t *funcA(sys_dlist_t *list, sys_dnode_t *node)
{
SYS_DLIST_ITERATE_FROM_NODE(list, node) {
if (node == <some condition>) {
return node;
}
}
return NULL;
}
sys_dlist_t list = &<some list>;
sys_dnode_t *node = NULL;
do {
node = funcA(list, node)
if (node == <some other condition>) {
goto found;
}
} while(node);
<handle error>
found:
<do stuff with node>
Change-Id: I17a5787594a0ed1a4745bd2e1557dd54895105ca
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
Currently, for the following MQTT msg fields:
- client_id
- will_topic
- user_name
- topic
their length is computed inside the routine that receives the MQTT msg.
Although this simplifies development, also imposes one restriction:
data must be null-terminated. Sometimes, data is received from other
sources and not generated by the application, so the null-terminated
constraint may be considered problematic for the user.
This patch removes the assumption that string fields are null-terminated.
Current data structures are already prepared to handle this case, so no
API change is required.
Change-Id: I5a147a5b21e0da49541cbe62baac363c8737cd3e
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
Duplicate const specifier, it should be the pointed data that is const.
Jira: ZEP-1723
Change-Id: I194abb0fc9ad564c6d53e4727bd63c8099d4eb2e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This implementation of _tsc_read returns a 64-bit value that
is derived from the 64-bit tick count multiplied by hwcycles per tick,
and then it adds the current value from the 32-bit timer.
This produces a 64-bit time. There is a bunch of math here, which
could be avoided if the CPU is built with Real-Time-Clock option.
EM Starter Kit SOCs don't have this. I don't think Arduino 101 does
either.
See ZEP-1559
Change-Id: I9f846d170246556ac40fe2f45809e457c6375d8c
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The interrupts would be placed at incorrect offsets on systems where
some interrupt vectors are reserved for exceptions, such as ARC.
Change-Id: I5b1f00eb9e8aecb84ae66e3d0461a734ffb5fbe6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adds crypto API interface for interaction between applications
and crypto drivers. Encryption/Decryption APIs are defined
here.
Jira: ZEP-328
Change-Id: I1a534ae2a69c7e1c416fa78a2822c37040b225f6
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Makes it cleared that zoap_update_from_block() doesn't modify the
packet.
Change-Id: I35429b153370c50eb5ae9c914b47a3144faf2f04
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Now types and functions have better explanations of their usage and
parameters associated.
Jira: ZEP-1657
Change-Id: I146688324080ac3cf0876f1db3c92c9514e1303d
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Its current placement was splitting the vector table in half.
Move to rodata, a better place for it. There's no requirement for
it to be in the text section.
Change-Id: I67724b2a26a9cb62c2ccd473cb54c53e4f74dc32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The BSS section needs to use AT> in XIP systems otherwise the LMA
addresses in the ELF binary are wrong, leading to issues if we
try to manipulate the binary with objcopy. The GROUP_DATA_LINK_IN
macro does the right thing here.
This was already done on other arches but ARC was missed.
Change-Id: I93748e919e0b68c1ff2dfb4b85b7064a8d980f3a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
XCC does neither define __BYTE_ORDER__ nor __ORDER_LITTLE/BIG_ENDIAN__ macros.
This resulted in field preempt of thread.base not correctly built from other
union fields prio and sched_locked, which caused wrong scheduling.
Change-Id: I8566ef4a5cf555906c012c4adc488f9afb26c053
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
1) Fatal errors now all go through _SysFatalErrorHandler. When the
simulator is used, only the death of 'essential' threads will result
in the simulator exiting; some test cases that test exceptions may
actually expect a thread to terminate abnormally.
2) The human readability of the exception errors is improved.
Change-Id: I77f57ea0eae15b0c55237681b959cd21e3fe8c1c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The XCC compiler freaks out if a section name passed via
__attribute__((section)) has parenthesis in it. This happens in the
case of _MDEF_THREAD_DEFINE.
It turns out the whole mechanism of placing kernel objects in completely
unique sections is totally unnecessary. This patch is a workaround until
we can clean this up.
Change-Id: I12c88a1b8f5b27bec27d608614356c1b479c0a8c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The old syntax is not accepted by some compilers including XCC.
Change-Id: Id90849a2159652ec225dd2c50d2dc2ddc22a3e08
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
find_msb_set logic was wrong. find_lsb_set() is now an inline function.
Change-Id: I2c19540907723589298b2f6af2ce1d68704bf1d7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Master branch changed requirements for license headers while this
branch has been in development.
Change-Id: I9bce16ff275057a4bb664019628fc9b6de7aef7c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The current I2C API provides inline functions to access 1 byte
register addresses. This commit adds a set of I2C inline functions
as shortcuts to handle:
- 16 bit register addressing. A family of functions that allows to
handle 2 byte register addressing and can receive the address
parameter as a simple variable. This allows a developer to handle
the address as a C constant or macro.
- Multiple byte addressing. A family of functions to access
registers with a configurable register address size. This family
of functions handle register addressing of any size but receives
the address parameter as a byte array.
Change-Id: Id369ab9eaad7eea807554371d3a520f67dc2e0f2
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
In order for OpenOCD to have a high-level view of an RTOS, it uses the
GDB protocol to obtain symbols from the system.
The GDB protocol, however, does not allow obtaining fields from
structures directly, and hardcoding offsets is not only brittle (due to
possibly different architectures or changes in the code), it's also
infeasible considering Zephyr is highly-configurable and parts of key
structs can be compiled in or out.
Export an array with offsets for these key structs. Also add a version
element in that array to allow changes in those structs.
Change-Id: I83bcfa0a7bd57d85582e5ec6efe70e1cceb1fc51
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
