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gpio: enable ports F G (and H) for stm32f1xx (stm32f4xx)

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Some GPIO ports activation where missing since not used
on available soc/boards.
Since stm32 family increases, activation of these ports
should be made available.

Jira: ZEP-1551

Change-Id: I612d135b28ef255bc771599e33796671ff81d0ac
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-02-20 11:34:00 +01:00 committed by Kumar Gala
parent 29a8e0292e
commit 0aea704462
2 changed files with 32 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/gpio/gpio_stm32.c
View File

@ -335,15 +335,42 @@ GPIO_DEVICE_INIT("GPIOE", e, GPIOE_BASE, STM32_PORTE,
#ifdef CONFIG_GPIO_STM32_PORTF
GPIO_DEVICE_INIT("GPIOF", f, GPIOF_BASE, STM32_PORTF,
STM32_PERIPH_GPIOF, STM32_CLOCK_BUS_GPIO);
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
STM32_PERIPH_GPIOF, STM32_CLOCK_BUS_GPIO
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPF
| STM32F10X_CLOCK_SUBSYS_AFIO
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOF
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
#endif /* CONFIG_GPIO_STM32_PORTF */
#ifdef CONFIG_GPIO_STM32_PORTG
GPIO_DEVICE_INIT("GPIOG", g, GPIOG_BASE, STM32_PORTG,
STM32_PERIPH_GPIOG, STM32_CLOCK_BUS_GPIO);
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
STM32_PERIPH_GPIOG, STM32_CLOCK_BUS_GPIO
#else
#ifdef CONFIG_SOC_SERIES_STM32F1X
STM32F10X_CLOCK_SUBSYS_IOPG
| STM32F10X_CLOCK_SUBSYS_AFIO
#elif CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOG
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
#endif /* CONFIG_GPIO_STM32_PORTG */
#ifdef CONFIG_GPIO_STM32_PORTH
GPIO_DEVICE_INIT("GPIOH", h, GPIOH_BASE, STM32_PORTH,
STM32_PERIPH_GPIOH, STM32_CLOCK_BUS_GPIO);
#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE
STM32_PERIPH_GPIOH, STM32_CLOCK_BUS_GPIO
#else
#ifdef CONFIG_SOC_SERIES_STM32F4X
STM32F4X_CLOCK_ENABLE_GPIOH
#endif
#endif /* CONFIG_CLOCK_CONTROL_STM32_CUBE */
);
#endif /* CONFIG_GPIO_STM32_PORTH */

2
include/drivers/clock_control/stm32f1_clock_control.h
View File

@ -43,6 +43,8 @@ enum {
STM32F10X_CLOCK_SUBSYS_IOPC = STM32F10X_CLOCK_APB2_BASE | 1 << 4,
STM32F10X_CLOCK_SUBSYS_IOPD = STM32F10X_CLOCK_APB2_BASE | 1 << 5,
STM32F10X_CLOCK_SUBSYS_IOPE = STM32F10X_CLOCK_APB2_BASE | 1 << 6,
STM32F10X_CLOCK_SUBSYS_IOPF = STM32F10X_CLOCK_APB2_BASE | 1 << 7,
STM32F10X_CLOCK_SUBSYS_IOPG = STM32F10X_CLOCK_APB2_BASE | 1 << 8,
STM32F10X_CLOCK_SUBSYS_ADC1 = STM32F10X_CLOCK_APB2_BASE | 1 << 9,
STM32F10X_CLOCK_SUBSYS_ADC2 = STM32F10X_CLOCK_APB2_BASE | 1 << 10,
STM32F10X_CLOCK_SUBSYS_TIM1 = STM32F10X_CLOCK_APB2_BASE | 1 << 11,