Add a set of tests to check the API behavior. The API tests can only run
on a platform that does not have an actual pinctrl driver, e.g.
native_posix. The test itself implements a pinctrl mock driver and
provides the required "pinctrl_soc.h" header with required types/macros.
The implementation is used in the tests to verify the behavior of the
API or Devicetree macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit enables target board to run the dac_api
testcase on the b_u585i_iot02a board
DAC 1 channel 1 is used.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Refactors all of the counter drivers to use a shared driver class
initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to
allow configuring counter drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are the maxim_ds3231 and mcp7940n drivers which have a
dependency on a SPI driver and must therefore initialize later than the
default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
add adc to board dts file,
update yaml files and documentation,
add adc 1 channel pins 1 and 15 to the pinmux file,
add overlay file to the board adc sample,
add board to the adc test file and
Signed-off-by: Andrei Auchynnikau <ovchinnikov@strim-tech.com>
The GPIO block of the NEORV32 contains fully independent inputs and
outputs (inputN is fully independent of outputN).
This scenario is not handled by the 1pin GPIO test case, so exclude the
neorv32 for now.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
RT10xx platforms will fail to build with SPI and Ethernet enabled due to
a pin conflict. Exclude them from the ethernet build test as it enables
SPI and will fail.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adds SPI support on LPSPI1 to the RT1010. LPSPI1 is available on pins
6, 8, 10, and 12 of J57 on the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit enables the LPSPI1 peripheral on the RT1015 EVK. LPSPI pins
are not populated by default, but headers can be added to J19 on the EVK
to access these signals
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for LPSPI to mimxrt1024_evk. LPSPI1 is exposed on pins
6,8,10, and 12 of J19 of the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing,
and requires that the board have solder jumpers R278, R279, R280,
and R281 bridged.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing, and
requires that the board have solder jumpers R278, R279, R280, and R281
bridged.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT1050 has multiple LPSPI peripherals. The simplest to access is LPSPI1,
which can be connected by bridging solder jumpers on the board. Enable
this SPI peripheral, and set it as default for SPI tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
However, there are cases when milliseconds granularity is not
enough and can significantly reduce a throughput, e.g. 1ms is
100 bytes at 1Mb.
Updated 4 drivers which implement asynchronous API. Updated
places where API was used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Remove CC1200 and CC2520 devicetree nodes from the test as they are not
sensors and are not being built by this test regardless.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adds build_all for ieee802154 drivers. A substantial number of drivers
are for SoC peripherals, so test cases are required many boards.
Fixes#11519.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Remove two unused files that were left floating around when the
build_all sample was split up.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Configure the target board to PASS the test case.
The PCLK2 clock feeding the SPI1 is reduced by 2 (apb2 prescaler)
to accept the slow freq config.
The SPI1 MISO and MOSI pins are linked on the HW board
(on arduino CN13, D11 & D12)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move memory.h out of the way in a more "private" space
(include/linker/devicetree_reserved.h) to prevent polluting the
devicetree space.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
For some reason, provided pin configuration for nucleo_f103rb
is not able to detect gpio callback issues.
Move to other pin combination which detect pin callback issues.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixes: #38403
Adding NET_DRIVERS menuconfig so that network drivers are grouped
together in its own menu entry under drivers, similar to most other
drivers.
This further has the advantages that `CONFIG_NET_DRIVERS` can be used
for testing to determine if network drivers has been selected.
This changed revealed a dependency loop where both `select` (for SLIP)
and `depends` (for PPP) which both depends on NET_DRIVERS` where in use
in the dependency tree for Qemu networking, especially NET_SLIP_TAP.
This is handled by defaulting `NET_DRIVERS` to `y` when building for a
Qemu target.
`SLIP` had a dependency to `!QEMU_TARGET || NET_QEMU_SLIP`. This is
changed so that SLIP prompt depends on `!QEMU_TARGET` which provides
full user control in hardware but makes the symbol promptless on Qemu
targets.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
1. Add support for multiple syscon entries (as a side effect, this also
fixed syscon.c implementations which weren't being linked to their
syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon
Signed-off-by: Yuval Peress <peress@chromium.org>
Remove the HL7800 DTR device tree binding because the
DTR IO is not needed for operation of the HL7800
modem.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit corrects the DMA channels for the asynchronous
UART API testing support on the SAM R21 Xplained Pro board.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
For getting the address of the RAM region in the application we need to
extend the api for the flash_simulator.
This path introduce flash_simulator_get_memory() call which allow to
do so.
Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Adding adp_xc7k_ae350 board support based on andes_ae350 soc. It's base
support and only contains uart/gpio drivers.
Signed-off-by: Jim Shu <cwshu@andestech.com>
Note that the it8xxx2 does not support a status register so that
functionality is omitted.
This change also adds driver tests that build both the npcx and it8xxx2
drivers.
Signed-off-by: Yuval Peress <peress@chromium.org>
It enables the usart6 to run the testcase with a DMA
tests/drivers/uart/uart_async_api. DMA2 (of type V1)
is configured on channel 5 (request) streams 7 & 2.
USART Tx and Rx PG14 - PG9 pins (14 & 16 of CN10)
are connected to PASS the test.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds basic support for the Silabs Si7210 hall effect magnetic
position and temperature sensor. It is able to get magnetic field and
temperature in the default scale of the sensor (depending on the
variant). It also supports going into sleep mode without measurements
through the device power management infrastructure.
It is most notably missing support for scale change, measurement
averaging and filtering, and alert pin configuration (threshold,
hysteris, tamper).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Allow UART driver that offload interrupt processing
to workuqueue, like CDC ACM UART to work.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This sets the dts of DMA for using pn the uart 2 i.
The stm32h723 has a DMAMUX and request are 44 and 43 for usart2
The Tx&Rx pins PD5 and PD6 of the usart2 are connected
on the nucleo_h723zg board to pass the test
Signed-off-by: Francois Ramu <francois.ramu@st.com>
