Commit Graph

59 Commits

Author SHA1 Message Date
Jim Shu
8d8d6d9a6a riscv: linker: fix PMP support on non-XIP system.
On non-XIP system, RAM region overlaps ROM region which cause PMP region
overlapping. Padding RAM region by adding a output section to update
the next free address of RAM region.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-09-29 14:44:04 -04:00
Jim Shu
c1dc4a6f61 riscv: linker: fix __rom_region_end in non-XIP system
In non-XIP system, because ROMABLE_REGION == RAMABLE_REGION, setting
__rom_region_size/end symbol at linker script end will mistakely
contain RAMABLE_REGION in it.

Move __rom_region_end symbol to end of common ROMABLE_REGION (text
and rodata) instead in non-XIP system.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-09-29 14:44:04 -04:00
Alexandre Mergnat
05f205066b copyright: add missing license
Solderpad Hardware License

Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
2021-09-24 17:07:37 -04:00
Torsten Rasmussen
15e834a687 linker: __data_region_start equal to __data_start
Fixes: #38591, #38207, #37861

The commit 65a2de84a9 aligned the data
linker symbol for sections and regions.

The data region symbol start has been placed outside the sections thus
being defined as the address of the region before alignment of the first
section in the data region, usually the `datas` section.

The symbol defining the start address of the data section is after
section alignment.
In most cases the address of the data region start and datas section
start will be identical, but not always.
The data region symbol is a new linker symbol and existing code has
been depending on the old data section start symbol.
Thus, the update to the use of the data region start symbol instead of
data ram start symbol thus results in a different address when the
section is aligned to a different address.

To ensure the original behavior in all cases, the data region start
address is now moved inside the data section.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-09-24 15:13:13 -04:00
Torsten Rasmussen
3d82c7c828 linker: align _image_text_start/end/size linker symbols name
Cleanup and preparation commit for linker script generator.

Zephyr linker scripts provides start and end symbols for each larger
areas in the linker script.

The symbols _image_text_start and _image_text_end sometimes includes
linker/kobject-text.ld. This mean there must be both the regular
__text_start and __text_end symbols for the pure text section, as well
as <group>_start and <group>_end symbols.

The symbols describing the text region which covers more than just the
text section itself will thus be changed to:
_image_text_start -> __text_region_start
_image_text_end   -> __text_region_end

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-28 08:48:03 -04:00
Torsten Rasmussen
c6aded2dcb linker: align _image_rodata and _image_rom start/end/size linker symbols
Cleanup and preparation commit for linker script generator.

Zephyr linker scripts provides start and end symbols for each larger
areas in the linker script.

The symbols _image_rom_start and _image_rom_end corresponds to the group
ROMABLE_REGION defined in the ld linker scripts.

The symbols _image_rodata_start and _image_rodata_end is not placed as
independent group but covers common-rom.ld, thread-local-storage.ld,
kobject-rom.ld and snippets-rodata.ld.

This commit align those names and prepares for generation of groups in
linker scripts.

The symbols describing the ROMABLE_REGION will be renamed to:
_image_rom_start -> __rom_region_start
_image_rom_end   -> __rom_region_end

The rodata will also use the group symbol notation as:
_image_rodata_start -> __rodata_region_start
_image_rodata_end   -> __rodata_region_end

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-28 08:48:03 -04:00
Torsten Rasmussen
65a2de84a9 linker: align __data_ram/rom_start/end linker symbol names
Cleanup and preparation commit for linker script generator.

Zephyr linker scripts provides start and end symbols for each section,
and sometimes even size and LMA start symbols.

Generally, start and end symbols uses the following pattern, as:
Section name:             foo
Section start symbol:     __foo_start
Section end symbol:       __foo_end

However, this pattern is not followed consistently.
To allow for linker script generation and ensure consistent naming of
symbols then the following pattern is introduced consistently to allow
for cleaner linker script generation.
Section name:             foo
Section start symbol:     __foo_start
Section end symbol:       __foo_end
Section size symbol:      __foo_size
Section LMA start symbol: __foo_load_start

This commit aligns the symbols for _data_ram/rom to other symbols and in
such a way they follow consistent pattern which allows for linker script
and scatter file generation.

The symbols are named according to the section name they describe.
Section name is `data`

A new group named data_region is introduced which instead spans all the
input and output sections that was previously covered by
__data_ram_start, __data_ram_end, and __data_rom_start.

The following symbols are aligned in this commit:
-  __data_ram_start  -> __data_region_start
-  __data_ram_end    -> __data_region_end
-  __data_rom_start  -> __data_region_load_start

The following new symbols are introduced so that the data section is
aligned with other sections:
-  __data_end
-  __data_start
       value identical to __data_region_start but describes start of
       the section.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-28 08:48:03 -04:00
Jim Shu
073cfa9cdf arch: riscv: introduce global pointer relative addressing support
Enable RISC-V GP relative addressing by linker relaxation to reduce
the code size. It optimizes addressing of globals in small data section
(.sdata).

The gp initialization at program start needs each SoC support. Also,
if RISC-V SoC has custom linker script, SoC should provide
__global_pointer$ symbol in it's linker script.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-08-20 18:53:23 -04:00
Dino Li
7c2dfc1558 riscv: linker: correct _image_rom_size symbol info
This makes the _image_rom_size provide correct actual ROM image size.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-08-18 15:40:49 -04:00
Jim Shu
e3fe63a221 arch: riscv: remove unneeded context switch to gp register
RISC-V global pointer (GP) register is neither caller nor callee
register, and it's a constant value in the single ELF file. Thus, we
don't need to save/restore GP at ISR enter/exit. Remove it to optimize
context switch performance.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-08-18 05:18:55 -04:00
Gerson Fernando Budke
a54fa4eb8e arch: riscv: common: linker: Add itcm & dtcm sections
The current riscv linker script don't have sections for
Data & Instruction Tightly Coupled Memory.  Add itcm and
dtcm sections to make it available.  All sections were
8 byte align to keep compatible with rv64 SoCs.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-08-14 20:27:52 -04:00
Dino Li
91ba039381 riscv: linker: add support for FLASH_LOAD_OFFSET
This allows board to re-configure ROM_BASE address while building
firmware image.

For example, a board need to build two firmware images. And the images
are put into one flash and required to work independent:

config FLASH_LOAD_OFFSET
    default 0 if FIRST_IMAGE
    default 0x80000 if SECOND_IMAGE

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-08-07 20:37:01 -04:00
Fabio Baltieri
ef93bbad57 linker: add an initialized DATA_SECTIONS linker location option
Current location options for linker source files includes init and
noinit ram data, but only a noinit ram section. This makes it impossible
for application code to define an initialized RAM output section,
such as with the Z_ITERABLE_SECTION_RAM() helpers.

Adding a DATA_SECTIONS linker source option for this use case.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2021-08-07 20:26:41 -04:00
Tim Lin
ef3c8507a6 ite: drivers/flash: add flash driver for it8xxx2
Add flash driver for it8xxx2. The driver can implement
flash read, write and erase that will be mapped to the
ram section for executing.

TEST="flash write 0x80000 0x10 0x20 0x30 0x40 ..."
     "flash read 0x80000 0x100"
     "flash erase 0x80000 0x1000"

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-06-22 15:15:20 -04:00
Dino Li
2bf63134e8 arch: riscv: linker script: add support for rom_start section
With this change, we can put contents into rom_start section
by calling zephyr_linker_sources(ROM_START ...)

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Co-authored-by: Torsten Tejlmand Rasmussen
Change-Id: If1169423b013d3e4df52d91cdb2fbdddc3bace7b
2021-06-04 16:31:00 -05:00
Torsten Rasmussen
7d37fe21d1 cmake: c++ exceptions linking support
Fixes part of: #32448

This commit updates the CMake CMAKE_CXX_LINK_EXECUTABLE to include
crtbegin.o and crtend.o at the right locations when linking with gcc.

It also updates linker scripts to ensure proper location of the
exception header frame sections.

This ensure proper handling of exceptions for those architectures
- x86
- xtensa
- riscv32

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-05-27 07:43:28 -05:00
Daniel Leung
1117169980 kernel: generate placeholders for kobj tables before final build
Due to the use of gperf to generate hash table for kobjects,
the addresses of these kobjects cannot change during the last
few phases of linking (especially between zephyr_prebuilt.elf
and zephyr.elf). Because of this, the gperf generated data
needs to be placed at the end of memory to avoid pushing symbols
around in memory. This prevents moving these generated blocks
to earlier sections, for example, pinned data section needed
for demand paging. So create placeholders for use in
intermediate linking to reserve space for these generated blocks.
Due to uncertainty on the size of these blocks, more space is
being reserved which could result in wasted space. Though, this
retains the use of hash table for faster lookup.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-04-27 13:32:00 -04:00
Anas Nashif
0ec3774bde userspace: rename _is_user_context -> k_is_user_context
This functions is being called across the tree, no reason why it should
not be a public API.

The current usage violates a few MISRA rules.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-01 05:34:17 -04:00
Anas Nashif
12b53d121e clock: rename z_timer_cycle_get_32 -> sys_clock_cycle_get_32
This is another API that is being used in all timer drivers and is not
internal to the clock subsystem. Remove the leading z_ and make promote
it to a cross-subsystem API.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-19 11:22:17 -04:00
Antony Pavlov
f463bcaa9d include: arch: riscv: drop __soc_get_irq() declaration
There is no __soc_get_irq() definition in the Zephyr source
code tree.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2021-02-25 21:52:20 +03:00
Shih-Wei Teng
a418b2535b RISC-V: Enhancement for stack size to 16-bytes aligned at least
If enable CONFIG_PMP_STACK_GUARD, the stack size may not 16-bytes
aligned. Enhance this issue.

Signed-off-by: Shih-Wei Teng <swteng@andestech.com>
2021-02-24 10:37:03 -05:00
Jim Shu
4004665fa7 arch: riscv: linker: fix _image_rom_start symbol
Change _image_rom_start symbol from 0 to the beginning of
ROMABLE_REGION.

Signed-off-by: Jim Shu <cwshu@andestech.com>
2021-02-16 15:16:56 +03:00
Enjia Mai
53ca709828 tests: coverage: exclude the CODE UNREACHABLE of code coverage
1. Exclude the CODE UNREACHABLE line while generating coverage report.
2. Exclude the memory domain deprecated API when calculating code
coverage.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-01-15 12:42:00 -05:00
Nicolas Royer
f5ac11ae32 arch: riscv: linker: add support for userspace
- Move kobject list after .bss
  The previous order shift kernel object address defined in prebuild
  file (which is use as reference in running time). So it was impossible
  for zephyr to check if a kernel object address was granted because
  address changed during build.

- Add support for memory shared.

- Move sdata2 section in ROM because it contains constants.

Signed-off-by: Nicolas Royer <nroyer@baylibre.com>
2020-11-09 15:37:11 -05:00
Alexandre Mergnat
542a7fa25d arch: riscv: add memory protection support
The IRQ handler has had a major changes to manage syscall, reschedule
and interrupt from user thread and stack guard.

Add userspace support:
- Use a global variable to know if the current execution is user or
  machine. The location of this variable is read only for all user
  thread and read/write for kernel thread.
- Memory shared is supported.
- Use dynamic allocation to optimize PMP slot usage. If the area size
  is a power of 2, only one PMP slot is used, else 2 are used.

Add stack guard support:
- Use MPRV bit to force PMP rules to machine mode execution.
- IRQ stack have a locked stack guard to avoid re-write PMP
  configuration registers for each interruption and then win some
  cycle.
- The IRQ stack is used as "temporary" stack at the beginning of IRQ
  handler to save current ESF. That avoid to trigger write fault on
  thread stack during store ESF which that call IRQ handler to
  infinity.
- A stack guard is also setup for privileged stack of a user thread.

Thread:
- A PMP setup is specific to each thread. PMP setup are saved in each
  thread structure to improve reschedule performance.

Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
2020-11-09 15:37:11 -05:00
Alexandre Mergnat
18962e4ab8 arch: riscv: add pmp support
- Set some helper function to write/clear/print PMP config registers.
- Add support for different PMP slot size function to core/board.

Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
2020-11-09 15:37:11 -05:00
Daniel Leung
8a79ce1428 riscv: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Tomasz Bursztyka
93cd336204 arch: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Eugeniy Paltsev
ebe51e26cb ARCH: COMMON: split sys_io.h for MMIO & memory bits functions
As of today 'include/arch/common/sys_io.h" has generic implementation
for MMIO accessors and memory bits manipulation functions. That leads
to several architectures like ARC, ARM/aarch64, ARM/aarch32/corter_a_r
redefine entire 'common/sys_io.h' even if they only have different
MMIO accessors implementation.

So split 'include/arch/common/sys_io.h" to
 * sys_io.h - generic MMIO accessors
 * sys_bitops.h - generic memory bits manipulation functions

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-09-01 13:36:48 +02:00
Andrew Boie
59a75dd3a8 arches: centralize noinit linker defintiions
This had been copy-pasted between linker scripts, create
a central header for it.

The linker scripts for xtensa and posix have very different
structure and have been left alone.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-07-30 21:11:14 -04:00
Kumar Gala
9ca541a504 linker: Remove deprecated Kconfig options related to linker scripts
Remove Kconfig, linker script, and related bits associated with
CUSTOM_RODATA_LD, CUSTOM_RWDATA_LD, CUSTOM_SECTIONS_LD,
SOC_NOINIT_LD, SOC_RODATA_LD, and SOC_RWDATA_LD options that have been
deprecated since Zephyr 2.2.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-12 11:14:28 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Kumar Gala
c2135f8721 devicetree: DT_NODE_HAS_COMPAT_STATUS_OKAY -> DT_NODE_HAS_COMPAT_STATUS
Swap this out and make the status a parameter.
Leave a couple of cases of DT_NODE_HAS_COMPAT().

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Martí Bolívar
7e0eed9235 devicetree: allow access to all nodes
Usually, we want to operate only on "available" device
nodes ("available" means "status is okay and a matching binding is
found"), but that's not true in all cases.

Sometimes we want to operate on special nodes without matching
bindings, such as those describing memory.

To handle the distinction, change various additional devicetree APIs
making it clear that they operate only on available device nodes,
adjusting gen_defines and devicetree.h implementation details
accordingly:

- emit macros for all existing nodes in gen_defines.py, regardless
  of status or matching binding
- rename DT_NUM_INST to DT_NUM_INST_STATUS_OKAY
- rename DT_NODE_HAS_COMPAT to DT_NODE_HAS_COMPAT_STATUS_OKAY
- rename DT_INST_FOREACH to DT_INST_FOREACH_STATUS_OKAY
- rename DT_ANY_INST_ON_BUS to DT_ANY_INST_ON_BUS_STATUS_OKAY
- rewrite DT_HAS_NODE_STATUS_OKAY in terms of a new DT_NODE_HAS_STATUS
- resurrect DT_HAS_NODE in the form of DT_NODE_EXISTS
- remove DT_COMPAT_ON_BUS as a public API
- use the new default_prop_types edtlib parameter

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-08 19:37:18 -05:00
Stephanos Ioannidis
aaf93205bb kconfig: Rename CONFIG_FP_SHARING to CONFIG_FPU_SHARING
This commit renames the Kconfig `FP_SHARING` symbol to `FPU_SHARING`,
since this symbol specifically refers to the hardware FPU sharing
support by means of FPU context preservation, and the "FP" prefix is
not fully descriptive of that; leaving room for ambiguity.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-05-08 10:58:33 +02:00
Kumar Gala
339e3f79eb riscv: linker: replace DT_FLASH_{BASE_ADDRESS,SIZE} with new macros
The riscv linker scripts utilize DT_FLASH_BASE_ADDRESS and
DT_FLASH_SIZE, as we want to phase out the old generator we need to
replace these defines with macros from devicetree.h.

We support two flash configurations at this point, either a QSPI flash
like on the hifive board or a SoC flash like on the rv32m1_vega.  We
update the linker scripts to check the compat of the zephyr,flash node
and based on if its 'jedec,spi-nor' or 'soc-nv-flash' we determine how
to extract the "flash" base address and size.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-05 09:23:32 -05:00
Stephanos Ioannidis
0e6ede8929 kconfig: Rename CONFIG_FLOAT to CONFIG_FPU
This commit renames the Kconfig `FLOAT` symbol to `FPU`, since this
symbol only indicates that the hardware Floating Point Unit (FPU) is
used and does not imply and/or indicate the general availability of
toolchain-level floating point support (i.e. this symbol is not
selected when building for an FPU-less platform that supports floating
point operations through the toolchain-provided software floating point
library).

Moreover, given that the symbol that indicates the availability of FPU
is named `CPU_HAS_FPU`, it only makes sense to use "FPU" in the name of
the symbol that enables the FPU.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-27 19:03:44 +02:00
Corey Wharton
c8f7cd5462 kconfig: Make the CPU_HAS_FPU_DOUBLE_PRECISION option global.
This option now applies to the RISC-V architecture and is no longer
a ARM only configuration.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2020-04-22 16:39:48 -07:00
Corey Wharton
58232d58e0 riscv: Add support for floating point
This change adds full shared floating point support for the RISCV
architecture with minimal impact on threads with floating point
support not enabled.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2020-04-22 16:39:48 -07:00
Andrew Boie
618426d6e7 kernel: add Z_STACK_PTR_ALIGN ARCH_STACK_PTR_ALIGN
This operation is formally defined as rounding down a potential
stack pointer value to meet CPU and ABI requirments.

This was previously defined ad-hoc as STACK_ROUND_DOWN().

A new architecture constant ARCH_STACK_PTR_ALIGN is added.
Z_STACK_PTR_ALIGN() is defined in terms of it. This used to
be inconsistently specified as STACK_ALIGN or STACK_PTR_ALIGN;
in the latter case, STACK_ALIGN meant something else, typically
a required alignment for the base of a stack buffer.

STACK_ROUND_UP() only used in practice by Risc-V, delete
elsewhere.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-04-21 18:45:45 -04:00
Kumar Gala
44270b5c6e irq: Remove return value from IRQ_CONNECT and IRQ_DIRECT_CONNECT
The return value of the interrupt is never used, so remove the
functionality from the API.  We ripple this change into the
ARCH_IRQ_CONNECT and ARCH_IRQ_DIRECT_CONNECT implementations.  With
this change we can also remove the compound expression as that is
not needed anymore.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-17 13:19:07 -05:00
Øyvind Rønningstad
05f0d85b6a extensions.cmake: Replace TEXT_START with ROM_START
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ulf Magnusson
4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Ulf Magnusson
def1f0e2d5 devicetree: Remove DT_SRAM_{BASE_ADDRESS,SIZE}, use CONFIG_* versions
The SRAM address and size are currently available as both
DT_SRAM_{BASE_ADDRESS,SIZE} and as CONFIG_SRAM_{BASE_ADDRESS,SIZE} (via
the Kconfig preprocessor).

Use the CONFIG_SRAM_* versions everywhere, and remove generation of the
DT_SRAM_* versions from gen_defines.py.

The Kconfig symbols currently depend on 'ARC || ARM || NIOS2 || X86'.
Not sure why, so I removed it.

It looks like no configuration files set CONFIG_SRAM_* at the moment, so
another option might be to use the DT_* symbols everywhere instead. Some
Kconfig.defconfig.series files add defaults to them though.

Also improve the help texts for CONFIG_SRAM_* to say that they normally
come from devicetree rather than configuration files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-07 17:19:36 +01:00
Olof Johansson
a6b3b616f5 riscv: use standard MSTATUS
This is no longer needed, since all in-tree platforms are only using
the standard mstatus formats. Remove it to avoid the complexity.

Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-06 13:27:45 -05:00
Øyvind Rønningstad
d1c2a4edbf cmake: Add the TEXT_START location to zephyr_linker_sources()
Places linker code at or near the beginning of the text section.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Andrew Boie
4f77c2ad53 kernel: rename z_arch_ to arch_
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Stephanos Ioannidis
2d7460482d headers: Refactor kernel and arch headers.
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.

The refactoring strategy used in this commit is detailed in the issue

This commit introduces the following major changes:

1. Establish a clear boundary between private and public headers by
  removing "kernel/include" and "arch/*/include" from the global
  include paths. Ideally, only kernel/ and arch/*/ source files should
  reference the headers in these directories. If these headers must be
  used by a component, these include paths shall be manually added to
  the CMakeLists.txt file of the component. This is intended to
  discourage applications from including private kernel and arch
  headers either knowingly and unknowingly.

  - kernel/include/ (PRIVATE)
    This directory contains the private headers that provide private
   kernel definitions which should not be visible outside the kernel
   and arch source code. All public kernel definitions must be added
   to an appropriate header located under include/.

  - arch/*/include/ (PRIVATE)
    This directory contains the private headers that provide private
   architecture-specific definitions which should not be visible
   outside the arch and kernel source code. All public architecture-
   specific definitions must be added to an appropriate header located
   under include/arch/*/.

  - include/ AND include/sys/ (PUBLIC)
    This directory contains the public headers that provide public
   kernel definitions which can be referenced by both kernel and
   application code.

  - include/arch/*/ (PUBLIC)
    This directory contains the public headers that provide public
   architecture-specific definitions which can be referenced by both
   kernel and application code.

2. Split arch_interface.h into "kernel-to-arch interface" and "public
  arch interface" divisions.

  - kernel/include/kernel_arch_interface.h
    * provides private "kernel-to-arch interface" definition.
    * includes arch/*/include/kernel_arch_func.h to ensure that the
     interface function implementations are always available.
    * includes sys/arch_interface.h so that public arch interface
     definitions are automatically included when including this file.

  - arch/*/include/kernel_arch_func.h
    * provides architecture-specific "kernel-to-arch interface"
     implementation.
    * only the functions that will be used in kernel and arch source
     files are defined here.

  - include/sys/arch_interface.h
    * provides "public arch interface" definition.
    * includes include/arch/arch_inlines.h to ensure that the
     architecture-specific public inline interface function
     implementations are always available.

  - include/arch/arch_inlines.h
    * includes architecture-specific arch_inlines.h in
     include/arch/*/arch_inline.h.

  - include/arch/*/arch_inline.h
    * provides architecture-specific "public arch interface" inline
     function implementation.
    * supersedes include/sys/arch_inline.h.

3. Refactor kernel and the existing architecture implementations.

  - Remove circular dependency of kernel and arch headers. The
   following general rules should be observed:

    * Never include any private headers from public headers
    * Never include kernel_internal.h in kernel_arch_data.h
    * Always include kernel_arch_data.h from kernel_arch_func.h
    * Never include kernel.h from kernel_struct.h either directly or
     indirectly. Only add the kernel structures that must be referenced
     from public arch headers in this file.

  - Relocate syscall_handler.h to include/ so it can be used in the
   public code. This is necessary because many user-mode public codes
   reference the functions defined in this header.

  - Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
   necessary to provide architecture-specific thread definition for
   'struct k_thread' in kernel.h.

  - Remove any private header dependencies from public headers using
   the following methods:

    * If dependency is not required, simply omit
    * If dependency is required,
      - Relocate a portion of the required dependencies from the
       private header to an appropriate public header OR
      - Relocate the required private header to make it public.

This commit supersedes #20047, addresses #19666, and fixes #3056.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-06 16:07:32 -08:00
Peter Robinson
2e1f8090b0 linker: riscv: discard .note.GNU-stack
Similar to what was required for x86 in #12719 / PR#12752

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2019-11-04 09:10:19 -05:00
Kumar Gala
00c7ce7942 linker: move where we define _LINKER and _ASMLANGUAGE
Move _LINKER and _ASMLANGUAGE to target.cmake because of how we pick the
linker script that might be used.  This way regardless of how or where a
linker.ld gets included we will always set _LINKER & _ASMLANGUAGE (so
any header that needs check based on those defines they can,
specifically generated_dts_board.h)

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-03 12:55:16 +01:00