MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add a set of tests to check the API behavior. The API tests can only run
on a platform that does not have an actual pinctrl driver, e.g.
native_posix. The test itself implements a pinctrl mock driver and
provides the required "pinctrl_soc.h" header with required types/macros.
The implementation is used in the tests to verify the behavior of the
API or Devicetree macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
When using group based representation on pinctrl nodes, the pin
configuration properties end up being at the grand-children level, so
the `pincfg-node.yaml` file can't be used.
Having a common file that can be used for both cases would require
tooling changes, so for now a copy that operated at the grand-children
level has been created.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move odr options from Kconfigs to Device Tree. Moreover add
in DT a power-mode option to select among 4 possible values
(PD, LP, HR, HF). The power mode cannot be currently set from
sensor APIs.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Create a common properties file that will be included by all DT
bindings (as i2c and spi) handled by lis2ds12 driver.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add a dedicated compatible for STM32MP1 clock control node.
Since, on such platform, clock configuration is done on A9
side, only the clock-frequency property is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add general mboxes, mbox-names to base.yaml to be utilized by any
clients that use mailboxes.
Additionally add mailbox-controller.yaml for common properties shared
by all mailbox controller devices.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Currently all the *-names and *-cells properties are derived from the
name of the base <name>s property. This is a limitation because:
- It forces the base property name to be plural ending in -s
- It doesn't allow the english exception of plural words ending in -es
With this patch we add one additional property 'specifier-space' that
can be used to explicitly specify the base property name.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Suggested-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The shared multi-heap memory pool manager uses the multi-heap allocator
to manage a set of reserved memory regions with different capabilities /
attributes (cacheable, non-cacheable, etc...) defined in the DT.
The user can request allocation from the shared pool specifying the
capability / attribute of interest for the memory (cacheable /
non-cacheable memory, etc...)
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Add specific properties to enable remap for PA11/PA12, which is a
possibility on STM32G0/F0 SoCs.
These properties only have effect when defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This name should be the same as cpus node in dtsi. After the power
policy is added, the cpu-power-states in the CPU properties can
be used.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
AHB prescaler is a value which divides the SYSCLOCK
to provide the HCLK. The HCLK supplies the core, AHB bus, memory.
On the stm32wb and stm32wl, the HCLK for CPU1 is HCLK1
with cpu1-prescaler.
By default the value is 1, else the HCLK must be correctly set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
interrupt controller, also places its relevant
peripheral sources allowing drivers to use the
DT macros instead of espressif headers.
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
This reverts commit d3a558591f.
We shouldn't be adding vendor prefixes for things we don't have
upstream bindings for unless we've inherited them from Linux.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
If supported by the SPI instance and soc, this property will
configure the frame-format to be compliant with the TI mode.
By default, if supported, the frame-format is Motorola mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add DT bindings for the optional Interrupt Translation Service module
of the ARM GICv3 Interrupt Controller.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Implements a shim layer driver using st hal for
I3G4250D gyro, mounted for example on stm32f3_disco_E.
No support for triggers included yet.
Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
1. Add support for multiple syscon entries (as a side effect, this also
fixed syscon.c implementations which weren't being linked to their
syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon
Signed-off-by: Yuval Peress <peress@chromium.org>
TWIM peripherals cannot perform write transactions from buffers
located in flash. The content of such buffers needs to be copied
to RAM before the actual transfer can be requested.
This commits adds a new property (zephyr,flash-buf-max-size) that
informs the driver how much space in RAM needs to be reserved for
such copying and adds proper handling of buffers located in flash.
This fixes an issue that caused that e.g. the DPS310 sensor driver
did not work on nRF SoCs that only have TWIM, not TWI peripherals.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Issue an error logging message when the i2c_nrfx_twim driver lacks
a concatenation buffer big enough to properly handle a call to
i2c_burst_write() function, to give the user a hint what is wrong.
Also use by default a 16-bytes long concatenation buffer for every
instance of the i2c_nrfx_twim driver. Such value should cover most
of the simple uses of the i2c_burst_write() function, like those
in the stmemsc sensor drivers, and when a longer buffer is needed,
the user will be provided with the above message pointing to the
property that should be adjusted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove the HL7800 DTR device tree binding because the
DTR IO is not needed for operation of the HL7800
modem.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Add a shim that allows using the nrfx PDM driver via the Zephyr API.
Add also missing devicetree nodes representing the PDM peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-pdm" binding with a new property that allows
specifying the clock source to be used by the PDM peripheral (so that
it is possible to use HFXO for better accuracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The max-erase-time property was introduced for the STM32 flash driver,
but it was inserted as an optional property in the generic
soc-nv-flash binding which is used by other SoCs.
Make it a required property in a new st,stm32-nv-flash binding
instead, since it is at present a vendor specific property.
Update the DTS files accordingly. Keep the existing "soc-nv-flash"
value in the compatible list in each case, so that DT_HAS_COMPAT(...
soc_nv_flash) tests on these nodes will still succeed, but put it
after a newly added "st,stm32-nv-flash" compatible, so that the
SoC-specific binding will be used as it is discovered first by the DT
tooling.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Note that the it8xxx2 does not support a status register so that
functionality is omitted.
This change also adds driver tests that build both the npcx and it8xxx2
drivers.
Signed-off-by: Yuval Peress <peress@chromium.org>
This commit adds support for Ethernet PHY drivers via a PHY API.
It also includes a driver for a generic MII compliant PHY
which supports most PHYs on the market.
Separating PHY driver from the SoC specific Ethernet driver
simplifies the Ethernet driver code and enables code re-use.
Drivers for specific PHYs with more advanced features, such as
RGMII delay in PHY can be developed independent of the Ethernet
MAC driver.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Add Digital-to-Analog Converter driver (based on DACC module) for Atmel
SAM MCU family. Only SAME70, SAMV71 series devices are supported in
this version.
Tested on Atmel SMART SAM E70 Xplained board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Microchip MEC172x series I2C driver implementing controller
and target modes. The driver implemenents its own I2C port
pin control functions and does not depended upon pinmux. Future
updates will make use of PINCTRL when that subystem is finalized.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
