MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Pick those common node in 'fvp-baser-aemv8r.dts' to 'fvp-aemv8r.dtsi'
which reside in 'dts/arm64/fvp-aemv8r' directory.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
The repository to the DAPlink firmware for the reel board has been moved
to the Github organization PHYTEC-Messtechnik-GmbH. This commit replaces
the link in the Zephyr reel board documentation accordingly.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
This commit enables the DAC 1 instance on the target board
b_u585i_iot02a from STMicroelectronics.
DAC1 output 1 is available on PA4.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Refactors all of the CAN drivers to use a shared driver class
initialization priority configuration, CONFIG_CAN_INIT_PRIORITY, to
allow configuring CAN drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The exception
is the mcp2515 driver which has a dependency on a SPI driver and must
therefore initialize later than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
When build and run the tests manually with west, we could
build successfully, but can not get output after flashing.
It should rely on adsplog.py to get output,
and the cause is loop time too short to get output.
So, we change the loop time back to 1.
Signed-off-by: Lixin Guo <lixinx.guo@intel.com>
add adc to board dts file,
update yaml files and documentation,
add adc 1 channel pins 1 and 15 to the pinmux file,
add overlay file to the board adc sample,
add board to the adc test file and
Signed-off-by: Andrei Auchynnikau <ovchinnikov@strim-tech.com>
Use a link to the standard pyOCD Debug Host Tools documentation section
instead of outdated links to non-existent GitHub repos.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This PR updates GPIO driver to use DTS information
regarding gpio availability.
This also fixes interrupt handling and
also removes kconfig definition for GPIO port.
A few configuration checks were also added to
improve code usage.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add zephyr_udc0 (USB device controller) nodelabel to
STM32 boards with usbotg_fs node to allow generic USB device
samples to be build.
Follow up on commit e4f894788a
("boards: add zephyr_udc0 nodelabel to all boards with USB support")
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Refactors all of the ADC drivers to use a shared driver class
initialization priority configuration, CONFIG_ADC_INIT_PRIORITY, to
allow configuring ADC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are lmp90xxx, mcp320x, and mcux_adc16 drivers which have
dependencies on GPIO, SPI, and/or DMA drivers and must therefore
initialize later than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Add a Kconfig option, similar to the one that is already available
for nRF5340, that allows enabling the REG0 (VDDH) DC/DC converter
in nRF52840. Make use of this option in Nordic boards: nRF52840 DK
and nRF52840 Dongle.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Uses the stats subsys to provide simple but useful debugging stats for
power management state changes and timing.
Removes the no longer needed PM_DEBUG config option
Replaces the use of PM_DEBUG for a test clock output pin for mec1501 and
adds in its place an SoC Kconfig option to enable it.
Adds a STATS_SET macro for assigning a value to a stat group field
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add a basic board definition for the open-source NEORV32 RISC-V
compatible processor system (SoC).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
1) Allow use of interrup driven instance.
ROM implementation could be selected via dts compatiable.
2) Use UART rx fifo and timeout interrupt for end of message detection.
Added to decrease interrupts count on data reception
3) Use ESP_LL api.
Signed-off-by: Pavlo Hamov <p.hamov@venstar.com>
MCUXpresso SDK sets the drive strength of LPUART and LPI2C pins to 4 for
this SOC, versus 6 for most other RT10xx boards. Update the pinmux.c
file for mimxrt1010_evk to reflect this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adds SPI support on LPSPI1 to the RT1010. LPSPI1 is available on pins
6, 8, 10, and 12 of J57 on the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit enables the LPSPI1 peripheral on the RT1015 EVK. LPSPI pins
are not populated by default, but headers can be added to J19 on the EVK
to access these signals
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for LPSPI to mimxrt1024_evk. LPSPI1 is exposed on pins
6,8,10, and 12 of J19 of the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing,
and requires that the board have solder jumpers R278, R279, R280,
and R281 bridged.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing, and
requires that the board have solder jumpers R278, R279, R280, and R281
bridged.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT1050 has multiple LPSPI peripherals. The simplest to access is LPSPI1,
which can be connected by bridging solder jumpers on the board. Enable
this SPI peripheral, and set it as default for SPI tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This is the initial Zephyr support for Intel SoC FPGA Agilex support.
Agilex has quad-core 64-bit Arm Cortex*-A53.
This patch build Zephyr for Agilex development kit with 256KB SDRAM and
support hello_world sample code. The Zephyr will need to be loaded by
Intel Arm Trusted Firmware (ATF).
Agilex Zephyr boot flow:
FSBL:ATF BL2(EL3) -> SSBL:ATF BL31(EL3) -> OS:Zephyr(EL2->EL1)
Intel ATF can be loaded from:
https://github.com/altera-opensource/arm-trusted-firmware.git
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
PA11 can be remapped to PA9 by using the recently introduced
remap-pa11-as-pa9 property.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Enable i2c1 and i2c2 nodes on b_u585i_iot02a.
i2c1 is used as Arduino I2C
i2c2 is used as bus for HTS221 MEMS device.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This changes is an adaptation for the different boards
based on the SOC_STM32F412ZG that has been redifined
to SOC_STM32F412ZX
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The mimxrt10xx evaluation boards that support the NXP USDHC IP
communicate unreliably with SD cards at 1.8V using the USDHC driver.
This commit temporarily disables 1.8V communication for all rt10xx
boards that currently support the USDHC driver.
Fixes#32289
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This kconfig is only used for one board and is simply an alias
to another kconfig. So remove CONFIG_DW_ICTL_OFFSET and apply
the value directly to the other kconfig.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove Kconfig options for enabling device instances in favor of
taking that information only from device tree. Prior to that
change there was a mix of devicetree and Kconfig.
Bring back use of CONFIG_GPIO_NRF_INIT_PRIORITY.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
