Ignore gapfill for RX target as some RX toolchains generate wrong
output image when running gapfill for binary format.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The qemu_rx some how with too big offset in "mov" instruction
cannot manipulate the memory correctly
This commit reconfigure the slot count to reduce the size of
psa_global_data_t struct so that issue on qemu_rx not occur
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The qemu_rx is having issue with twister harness, command cannot
be send from twister test to qemu console, this commit temporary
disable them for further checking
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Somehow icount shift making this test fail on qemu_rx target
maybe clock rate on RX is too low, as work around I disable
the icount shift for this test case on qemu_rx
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
GCC for RX would crash with an internal compiler error during
DWARF frame generation in `dwarf2out_frame_debug_adjust_cfa()`
when compiling the `trigger_fault_illegal_instruction()`
test function.
This patch adds `__builtin_unreachable()` to help the compiler
reason about control flow, preventing incorrect DWARF CFA
generation.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The prj.conf was missing CONFIG_COMMON_LIBC_MALLOC causing
warning of the depended config CONFIG_COMMON_LIBC_MALLOC_ARENA_SIZE
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Change noinit region to be after bss so that it would not cause
alignment issue for the data region setup
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The QEMU RX doesn't allow to write value to IR flag,
There is also mentioned in RX HWM that the IR should
not be write 1 to. So we change the method to trigger
interrupt here is to call directly to SW irq table
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The "p -= slab->info.block_size;" is causing the "p" pointer
to be underflow in RX architecture case, where the RAM address
start from 0x0, in some case p minus block size make it underflow
This change implementation uses an index-based reverse loop to
safely iterate over each block from last to first.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The source code is missing the Receive enable in serial
poll-in function so the status flag will never become affect
and data will never be read
Add the RE write before checking for receive status flag
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
The RX linker is using the name "data" for .data region start
which caused the application cannot use "data" for variable
naming globally.
This commit change the name to "__data_region_start" as expected
in the linker_defs.h file
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
I'm not sure why this was necessary, but analyzing RX
executables was crashing with a divide by zero error on a
symbol which appeared to be duplicated in this list.
Signed-off-by: Keith Packard <keithp@keithp.com>
RX adds an underscore to all global symbols, so when we look for
log_const_ globals, we need to allow for that.
Signed-off-by: Keith Packard <keithp@keithp.com>
This architecture is missing lots of support bits. Stub out this piece so
we can get more things building.
Signed-off-by: Keith Packard <keithp@keithp.com>
I2S driver support standard format, short/long sync, left/right justified.
Supporting 2 channels as a default.
Signed-off-by: Lewis Lee <llee@ambiq.com>
Fixes these files to no longer delete non-secure partitions as
they are not present, and updates the offset of the area to use
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add LINKLAYER_PLAT_EnableBackupDomainAccess() and
LINKLAYER_PLAT_DisableBackupDomainAccess() to use Zephyr resources
that use a reference counter for access requests, for enabling
and disabling access the BackupDomain resources.
Bump hal_stm32 module to the revision integrating related stm32wba
BLE updates.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fix STM32 WBA and H7 clock drivers to release the reference counter
added to access LSE configuration controllers once the clock is
configured. Keeping such an unbalanced access request is no more
needed since SoC functions manage reference counting of access requests.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access.
By the way, correct stm32_hsem.h header file inclusion that requires
brackets (<>) delimiters, not double quotes, as per convention on header
location.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access.
By the way, move inclusion of stm32_hsem.h header file after inclusion
of the LL header files and Zephyr header standard files.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access. When we're done accessing RTC registers and
other protected resource, release the access refcount.
By the way, simplify rtc_stm32_read() when COUNTER_NO_DATE is defined
that used a useless extra local variable.
By the way, correct stm32_hsem.h header file inclusion that requires
brackets (<>) delimiters, not double quotes, as per convention header
location.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Use recently added SoCs functions to request access to SoC backup
domain resources These function use a reference counter to track these
request and ensure the resources are accessible as long as at least a
consumer requires access.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Add SoC functions to enable/disable STM32 backup Domain access
and use a reference counter to track requests. These helper functions
may be called from a interrupt context. On domain access enable, the
function loops until written bit is set however this is expected to be
effective after very few clock cycles and seems not even required
(not mentioned in any SoC documentation). The loop is preserved as
used in previous implementation.
Among all supported STM32 SoCs, only STM32C0 and STM32WB0 series do not
implement this mechanism hence add option CONFIG_STM32_BACKUP_PROTECTION
that is enabled for all SoC series but these 2.
Fixes issue 90942.
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Update with the latest nordic hal which includes an updated
CRACEN driver which supports the 54LM20 and newer devices
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Updated documentation to clarify that while credential pairs should
generally share the same secure tag for subsystems supporting multiple
credentials per tag, some implementations may expect only one credential
per tag.
Signed-off-by: Maxwell Weru <mburumaxwell@gmail.com>
...when FIFO is empty"
This reverts commit 47e43d552e.
This is breaking sample.sensor.shell.pytest where characters
are either missing or repeated when printing to the console.
Originally this is just for RISC-V with PLIC interrupt
controller. That was made more general to avoid having arch
specific code in a generic driver. And now it is breaking
on non-RISC-V platforms. Note that the QEMU RISC-V boards
all have PLIC as interrupt controller and are passing sensor
shell pytest without this workaround. So this does not seem
to be an issue with PLIC and NS16550. So revert the commit
for now.
Fixes#92187
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add support for the stlink_gdbserver runner to the aforementionned board.
Update the "Debugging" section of the board documentation accordingly,
along with cleaning up the existing text.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Add support for the stlink_gdbserver runner to the aforementionned board.
Update the "Debugging" section of the board documentation accordingly,
along with cleaning up the existing text.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
When try to set twt, system will try to
get interface status firstly.
In shim driver, miss filling twt_capable field.
The twt_capable is set as false by default.
Failed to set twt because of incorrect
twt_capable.
Add enhance code to fill twt_capable field
in shim driver.
Signed-off-by: Qiankun Li <qiankun.li@nxp.com>
With the current configuration, we encounter a user setting error
during the test with the log:
"Wrong number of bytes received, got: 2, expected: 3."
Workaround:
Increase the clock frequency to enable faster data transmission
and avoid user setting errors.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
