- This includes the driver, test app, and sample app
- Only the boards\arm\cy8cproto_062_4343w board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
As of today it is not possible to use SPI dt-spec macros in C++,
something known and documented. The main reason is because `cs` property
is initialized using a compound literal, something not supported in C++.
This PR takes another approach, that is to not make `cs` a pointer but a
struct member. This way, we can perform a regular initialization, at the
cost of using extra memory for unused delay/pin/flags if `cs` is not
used.
Fixes#56572
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove include of adc dt-bindings header since these are
already included in the root .dtsi file that adds an adc.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
NTC thermistor changes updated the sample app output,
correcting harness string to match sample app.
Signed-off-by: Al Semjonovs <asemjonovs@google.com>
PR https://github.com/zephyrproject-rtos/zephyr/pull/55129 deleted the
"port-sel" property. Delete this property from remaining Microchip SoC
variants and boards.
Test: west build -b mec172xevb_assy6906 samples/drivers/espi/
Signed-off-by: Keith Short <keithshort@google.com>
The `main` function now returns `int` instead of `void` and therefore
must return a value.
Signed-off-by: Stephanos Ioannidis <stephanos.ioannidis@nordicsemi.no>
This is a follow-up to commit 9fa35bc9a0.
Align specification of the expected console output with the changes
done to the sample in the above commit.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This applies the coccinelle script to another set of files:
samples/bluetooth/bthome_sensor_template/src/main.c
samples/boards/stm32/power_mgmt/standby_shutdown/src/main.c
samples/drivers/smbus/src/main.c
samples/drivers/virtualization/ivshmem/doorbell/src/ivshmem.c
samples/fuel_gauge/max17048/src/main.c
samples/hello_world/src/main.c
samples/sensor/proximity_polling/src/main.c
samples/subsys/logging/ble_backend/src/main.c
tests/drivers/build_all/mfd/src/main.c
Signed-off-by: Keith Packard <keithp@keithp.com>
Remove RETURN_FROM_MAIN macro which performed control flow, violating
compliance tests. Replace with explicit use of posix_exit_main or return as
appropriate.
Signed-off-by: Keith Packard <keithp@keithp.com>
As both C and C++ standards require applications running under an OS to
return 'int', adapt that for Zephyr to align with those standard. This also
eliminates errors when building with clang when not using -ffreestanding,
and reduces the need for compiler flags to silence warnings for both clang
and gcc.
Most of these changes were automated using coccinelle with the following
script:
@@
@@
- void
+ int
main(...) {
...
- return;
+ return 0;
...
}
Approximately 40 files had to be edited by hand as coccinelle was unable to
fix them.
Signed-off-by: Keith Packard <keithp@keithp.com>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Provide a sample for ivshmem-doorbell running under virtualization
(QEMU). The sample relies on existing tools (ivshmem-server,
ivshmem-client) that must be run at the host (unix).
The sample can be run on userspace or kernelspace, and on arm64 (qemu,
kvm) and x86_64 (qemu) platforms.
This execution of this code is quite complex, thus the README should be
made available in the official documentation. This is why the code is a
sample and not a test.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Add the config for testing the jesd jedec sfdp of the octoNor flash
on the stm32h573 disco kit.
The external octoflash is the macronix MX25LM51245 or micron.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the new nucleo_h503rb board for testing the adc_api driver
on the ADC1 channel6 (pf12). Read the analog value of the ADC1
input on A5 of the arduino connector (CN16).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Similar to the changes made in #48048, compile in the appropriate lora
modem driver when `CONFIG_LORA=y`. The `LORA_SX12XX` symbol has no
use now so remove. LoRa and LoRaWAN subsystems are still marked as
unstable so no additional deprecation cycle is needed.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add all boards where the required overlay is present in the boards
folder to platform_allow. At the same time sort the list alphabetically
to keep a better overview.
Signed-off-by: Martin Jäger <martin@libre.solar>
Remove "-machine Q35" from QEMU_EXTRA_FLAGS since this is now the
default qemu_x86_64 configuration.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Quark SE does not exist in zephyr anymore and this sample was there as
one of the first i2c users in Zephyr and is not providing any value any
more.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
After reworking counter driver to use device tree this sample
stopped to compile for nordic DKs. Providing overlays to fix
the compliation.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Remove overlay added by mistake. SMBus EEPROM PR is not merged and the
dts would be updated for qemu_x86_64 board's dts.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Treat sample data as signed when using differential mode for ADC
sampling, so that negative differential samples will be converted
correctly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update board overlays for boards with LPADC IP present on their SOCs, to
use new LPADC API for channel numbering.
For the RT595 and LPCxpresso55S69 EVKs, additional channels are enabled
to demonstrate the resolution and differential channel features of
the LPADC.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add a board overlay for sam4s_xplained. Channel 5 (PB1) is enabled as
well as the internal temperature sensor.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add appropriate configuration parameters for using the Intel TCO
watchdog driver with the rpl_crb board.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add support for the Arduino GIGA board, an STM32H747XI based development
board in Arduino form factor, featuring external flash, SDRAM, Bluetooth
and WiFi.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add support for RT595 EVK to display sample using RM68200 based MIPI
panel. The board is configured with an increased heap size to account
for the panel's high resolution.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Microchip XEC devices specify GPIO pin using octal numbering and
organize pins in banks of 32. Chip documentation does not use
bank naming rather naming each pin by its octal number. This has
led to the developer having to calculate the bit position of a pin
in its 32-bit bank when a specifying the pin for GPIO usage. We
created a set of defines for all possible GPIO pins that specify
the DT GPIO bank name used in the chip level DTSI files and the
bit position in that bank.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
