Support OSPI flash driver on EK-RA8M1 and EK-RA8D1 with ospi_b
and S28HL512T flash.
Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
Add new device tree property specifying the number of
dummy-cycles required when reading the JEDEC ID.
The Arduino Opta has an at25sf128a with JEDEC ID 1F 89 01.
The PR below adds support for this, but the id read is 01 1F 89.
Changing DummyCycles to 16 causes the correct value to be read.
https://github.com/zephyrproject-rtos/zephyr/pull/89539
Signed-off-by: Mark O'Donovan <shiftee@posteo.net>
Clean up dt binding descriptions and introduce titles where
needed to make board documentation pages look nice. The supported
hardware table on board documentation pages sources its data
from dt bindings, and needs succinct titles.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add low-power-write property to MSC device tree node, set
MSC_WRITECTRL_LPWRITE if enabled.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Introduce separate flash driver for Silabs Series 2. This driver
is forked from the Gecko flash driver with no changes outside of
formatting and naming.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Add support for flash to cc23x0 SoC. The driver interacts with VIMS
(Versatile Instruction Memory System) internal bus standing before NVM.
Signed-off-by: Stoyan Bogdanov <sbogdanov@baylibre.com>
Signed-off-by: Julien Panis <jpanis@baylibre.com>
This commit adds two properties. One is used to set size of the low
flash device and the other is used to select the low flash device. Then,
the eSPI TAF request can access between two flash devices base on this
setting.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
- Bring macro defined of RA8 in flash_hp_ra.h to device tree
- Change to use irq_lock instead of semaphore for code flash
- Modify and add conditions to check and make decision to perform
action at last block.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
IAP is a reference to the method of software interaction with the flash
used in the current driver implementing support for this flash. The
DT compatible should not be named like this.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add the <requires-ulbpr> property from the "jedec,spi-nor-common.yaml"
to the existing st,stm32-qspi-nor.yaml. So that external quad-NOR with
unlock the Global Block Protection (BPR) (opcode 0x98) is accepted.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add configuration settings for the FOPT, FSEC, and flash configuration
offset to the FTFA module binding.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
... so that a clear devicetree error is reported when the pinctrl-names
property is missing, not a quite cryptic compilation error about an
undeclared PINCTRL_STATE_*_UPPER_TOKEN symbol in pinctrl.h.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Correct license identifiers in two files copied from internal Nordic
repositories that were not properly adjusted for Zephyr:
- dts/bindings/flash_controller/nordic,rram-controller.yaml (added in
commit 3a8ee7df91)
- dts/bindings/misc/nordic,nrf-dppic-local.yaml (added in commit
796d09d2a6)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix compilation error when reset-gpios is enabled.
Undefined reference to dev_cfg variable.
Reset gpio duration needs to be defined, but is not in binding file.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
The new bindings for the stm32 xspi is for new stm32 devices with
XSPI peripherals like the stm32h5 serie. This is close to the octo-spi.
Adapt the flash controller constants to the XSPI model especially.
This is done through a new xspi.h definition file.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The commit restricts erase-value to either 0xff or 0x00.
On program-erase type devices writes can only change from
erase value of bit to opposite, ease usually consists of two
operations which is programming the opposite value to every bit
of erase range and then turning back all bits to the "erase-value";
above makes it impossible to have erase value of device to be other
than 0xff or 0x00.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Add Nuvoton numaker series flash memory controller(RMC) with erase,
read & write features of soc-flash.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Added a simple driver for RRAM. It is implemented as a flash driver,
because the "RRAM eFlash" macro obeys flash-like constraints.
Although users are not required to erase before write.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Address and size are given by the DTS register property
of the qspi nor. The size Property becomes useless.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Address and size are given by the DTS register property
of the ospi nor. The size Property becomes useless
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds layput page cells to the atmel sam flash
controller and the flash node. These allow for describing
the actual flash page layout of each soc, allowing the
flash driver to fully utilize the capabilities of the
flash.
With this update, we unlock the following capabilties:
- utilize 2048 erase block size for small sectors
- utilize 16384 erase block size for large sectors
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This adds QSPI controller properties that allow tuning
chip select timings (needed for accessing QSPI at high speed)
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Modify the NPCX driver erase method to allow 0x1000 byte size erases
along with 0x10000 byte size erases based on input parameters
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Add Nuvoton numaker series flash memory controller(FMC) with erase,
read & write features of soc-flash. Also update Nuvoton manifest
to include zephyrproject-rtos/hal_nuvoton#6.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
This CL attempts to implement npcx's flash driver instead of the
original one (npcx spi driver plus spi_nor flash driver).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
- Added initial version of Infineon CAT1 Flash driver
- Added binding file for infineon,cat1-flash-controller.yaml
- Added overlays for subsys/nvs and drivers/flash_shell
to support cy8cproto_063_ble, cy8cproto_062_4343w boards
- Defined erase-block-size in PSoC6 MPN dtsi.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Add the ability for the flash simulator to store its contents in a
memory region.
This allows filesystems on the flash simulator to survive a reboot.
And allows subsystems (e.g. coredump) to store their info on ram while
using the (existing) flash partition backend.
Add a example (for nucleo_f411re) that shows how to configure the flash
simulator for hardware (cfg discussion #54166).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
This patch makes possible to choose custom byte which should be used
to enable non-permanent readout protection (RDP1). Actually, any byte
except 0xAA and 0xCC (which are used by RDP0 and RDP2 respectively)
can be used to enable RDP1 but in multi-image environment, some other
image could check if RDP1 is enabled by comparing it to some hardcoded
value.
If property is not defined, 0x55 will be used to enable RDP1. The
default value comes from STM32 HAL.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
