Commit Graph

114867 Commits

Author SHA1 Message Date
Neil Chen
46f2bcde28 dts: arm/nxp: Add lpspi nodes to NXP MCXA153 dtsi file
Add lpspi nodes to NXP MCXA153 dtsi file

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-05-09 12:51:20 +02:00
Neil Chen
a944cc3155 samples: drivers: i2c: add target_eeprom support for frdm_mcxa153 board
add i2c target_eeprom support for frdm_mcxa153 board

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-05-09 12:51:20 +02:00
Neil Chen
65d794a9d7 boards: nxp: frdm_mcxa153: Support lpi2c for NXP frdm_mcxa153 board
Support lpi2c for NXP frdm_mcxa153 board.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-05-09 12:51:20 +02:00
Neil Chen
4554bd0e7f dts: arm/nxp: Add lpi2c nodes to NXP MCXA153 dtsi file
Add lpi2c nodes to NXP MCXA153 dtsi file

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-05-09 12:51:20 +02:00
Neil Chen
9a58c44544 drivers: syscon: support mcxa153 lpi2c clock
MCXA153 only have one I2C, support its clock in syscon driver.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-05-09 12:51:20 +02:00
Nhut Nguyen
bc429da9fb drivers: gpio: rz: Mass renaming
Mass renaming is carried out to unify some prefixes and shorten some
macros, making the code easier to maintain and support new devices.

- Rename `int_dev` to `gpio_int_dev` for gpio interrupt
- Rename `eirq` to `ext_irq` for external interrupt
- Rename `gpio_rz_hw_config` to `gpio_rz_flags`
- Rename `p_pm` to `gpio_flags`
- Rename `pre_flags` to `rz_flags`
- Remove `_IOPORT` and `_PIN_CONFIGURE` in some macros
- Rename `GPIO_RZ_PIN_CONFIGURE_GET_FILTER`,
  `GPIO_RZ_PIN_CONFIGURE_GET`, `GPIO_RZ_PIN_SPECIAL_FLAG_GET` to
  `GPIO_RZ_FLAG_GET_FILTER`, `GPIO_RZ_FLAG_GET_CONFIG`,
  `GPIO_RZ_FLAG_GET_SPECIFIC` respectively

Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
2025-05-09 12:51:11 +02:00
Alain Volmat
f7a2b4e913 doc: release-notes-4-2: 8 bit bayer format renaming explanation
All 4 variants of 8 bit raw bayer video format renaming explained.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-09 10:42:37 +02:00
Alain Volmat
2d46727f52 drivers: video: rename 8 bit bayer format in Sxxxx
In order to be consistant with other formats bayer formats
recently introduced, rename all 4 8 bit bayer formats with a
S prefix (SBGGR / SRGGB / SGBRG / SGRBG).

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-05-09 10:42:37 +02:00
Vinayak Kariappa Chettimada
315ae48ceb Bluetooth: Controller: Use LOW_LAT_ULL implementation for ISO support
Use BT_CTLR_LOW_LAT_ULL implementation for enqueing ISO Rx.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-05-09 10:42:28 +02:00
Vinayak Kariappa Chettimada
3c661a1765 Bluetooth: Controller: Fix LOW_LAT_ULL implementation for ISO support
Fix BT_CTLR_LOW_LAT_ULL implementation for enqueing ISO Rx.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2025-05-09 10:42:28 +02:00
Vytautas Virvičius
9a409d6b00 net: l2: ppp: Explicitly negotiate ACCM
Many cellular modems attempt to negotiate an ACCM value of 0x00000000.
While the PPP driver rejects this by default, it does not propose an
alternative. As a result, some modems default to using 0x00000000 after
LCP negotiation. Because the PPP driver expects all control characters
to be escaped, this causes issues during decoding. This change
negotiates an ACCM value of 0xffffffff to ensure compatibility with such
modems.

Signed-off-by: Vytautas Virvičius <vytautas@virvicius.dev>
2025-05-09 08:23:16 +02:00
Daniel Leung
b6be487394 xtensa: update HAL path for custom compilations
Xtensa arch layer has some custom compilation commands to
generate the interrupt dispatchers and the core-isa* files.
However, the include path to find core-isa.h does not work
for Espressif ESP32. So update the mechanism to use correct
path pointing to Espressif HAL when targeting ESP32 family
SoCs.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2025-05-09 08:23:09 +02:00
Miguel Gazquez
f8450e4bed pinctrl: Add missing newline in .dtsi
Add a missing newline between two groups in the pin control .dtsi
file for the ch32v003evt and the linkw board to comply with style
rules.

Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
2025-05-09 08:23:02 +02:00
Jianxiong Gu
31d65aac5d drivers: pinctrl: wch_20x_30x_afio: fix afio remap
- Enable AFIO clock prior to remap configuration
- Consolidate remap logic in a single conditional block
- Correct USART1 remap detection by checking pcfr_id
- Apply changes to pinctrl_wch_afio.c

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-05-09 08:22:40 +02:00
Benjamin Cabé
ed4222e238 doc: releases: Intermediate update for new 4.2 boards/samples/drivers
New boards, drivers, samples since Apr. 10, 2025.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-05-09 01:41:43 +02:00
Carles Cufi
c5033a2a53 manifest: Update hal_nordic revision to pull in #292
Pull in https://github.com/zephyrproject-rtos/hal_nordic/pull/292.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2025-05-09 01:41:13 +02:00
Declan Snyder
ddce1e1c67 soc: nxp: rw: Policy constraints when PM2 enabled
When PM2 is enabled, it will disable many of the devices, so need to
enable PM policy constraints for this mode also so that device drivers
can work.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-05-09 01:41:05 +02:00
Robert Hancock
35b843b52e drivers: serial: serial_test: Support irq_update call
This driver doesn't need to do anything in its irq_update
implementation, but add a dummy one so that calls to uart_irq_update
don't fail with -ENOSYS.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2025-05-09 01:40:57 +02:00
Robert Hancock
c3f9e6d1ba drivers: serial: serial_test: support IRQ callback user data
This driver previously caused an assertion error if non-NULL user_data
was passed to uart_irq_callback_set. Add support for this by storing the
user data and passing it back to the IRQ callback function.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2025-05-09 01:40:57 +02:00
Josuah Demangeon
c2b408df9b samples: drivers: video: capture: fix Arduino Nicla Vision
Since #84446 it became necessary to enqueue a first video buffer before
performing the transfers. Apply this config change to the sample.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-05-09 01:40:47 +02:00
Martin Stumpf
acfd958f4b drivers: fpga: ice40: Fix log level
All FPGA driver implementations should respect `CONFIG_FPGA_LOG_LEVEL`.

Signed-off-by: Martin Stumpf <finomnis@gmail.com>
2025-05-09 01:40:35 +02:00
Michael Hope
3fe4bcb67b boards: wch: add the ch32v006evt
The WCH CH32V006EVT is an evaluation board for the RISC-V based
CH32V006K8U6 SOC.

The board is equipped with a power LED, reset button, USB port for
power, and two user LEDs.

Add the board definition, documentation, and sample overlay.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Michael Hope
e039b8d59c drivers: clock_control: set the flash wait state to match the RM
The flash latency needs to be configured before switching to the high
speed clock. Set the latency based on the CH32V003 and CH32V00x
reference manual.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Michael Hope
3dbf080698 hal: wch: widen the checks to include the CH32V family
Expand the current systick compatibility to include the CH32V00x
series. Change the HAL compatibility to include all of the CH32V
family.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Michael Hope
64067e5d6a soc: wch: add the CH32V00x series
Compared to the CH32V003, the CH32V00x series is an evolution that
uses a different microarchitecture (V2C instead of V2A) and different
pinctrl mappings.

Fork the current qingke_v2a and use the new proposed naming convention.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Michael Hope
d68c18471e dts: wch: add the Devicetree for the CH32V006
The CH32V006 is part of the CH32V00x series of 32 bit RISC-V
microcontrollers. This series is an evolution of the CH32V003 which
was used as a basis for this Devicetree definition.

Compared to the CH32V003, thie CH32V006 has an extra GPIO port (PB),
an extra UART (UART2), 8 KiB of RAM, 62 KiB of flash, and uses the
QingKe V2C core.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Michael Hope
f4b1544bec drivers: pinctrl: add a driver for the CH32V00x series
The CH32V006 and others in the CH32V00x series are an evolution of the
CH32V003 and use different remap offsets for the various peripherals.

In the same way as the CH32V20x, fork the CH32V003 driver and add
CH32V00x support.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Michael Hope
3468830744 arch: riscv: add support for the zmmul integer multiply extension
The QingKe V2C has an integer multiplier but no divide. Add support
for the corresponding Zmmul extension and, as the extension was added
in GCC 13.0, add a test for the compiler version.

Signed-off-by: Michael Hope <michaelh@juju.nz>
2025-05-09 01:40:22 +02:00
Anisetti Avinash Krishna
c65f1f50ed boards: intel: rpl: Added revisions for RPL-s board
Added 2 different revisions of RPL-s board with 2 PCH
options 600 series and 700 series.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2025-05-09 01:40:09 +02:00
Anisetti Avinash Krishna
528d47ddd2 dts: x86: intel: Corrected dev-id of SMBUS
Corrected dev-id of SMBUS accourding to the 600
series(ADL-s PCH).

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2025-05-09 01:40:09 +02:00
Emilio Benavente
417b9027a4 tests: drivers: watchdog: Enable reset none testing for ewm
Enabled the wdt_basic_reset_none to test boards using the EWM.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-05-09 01:39:56 +02:00
Emilio Benavente
6913527a74 dts: arm: nxp: mcxw71_common: Added EWM Support
Added EWM Support for MCXW71 and MCXW72

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-05-09 01:39:56 +02:00
Emilio Benavente
5fd6715917 drivers: watchdog: Added Driver for the EWM
Added a driver for the External Watchdog Driver

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2025-05-09 01:39:56 +02:00
Joel Guittet
54b826336b drivers: counter: counter_reset api support to stm32 timer
Add support to reset counter value.

Signed-off-by: Joel Guittet <joelguittet@gmail.com>
2025-05-08 19:53:12 +02:00
Dhruv Menon
b25591b7bc dts: ti: adjust GPIO base addresses for the updated driver
This commits follows the prior commit to update all the base
register which uses the Davinci driver as thier GPIO driver

Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
2025-05-08 19:50:31 +02:00
Dhruv Menon
6b363634d8 drivers: gpio: update GPIO register addresses for TI davinci
This commit adds a padding of 0x10 bytes at the beginning of the
`gpio_davinci_regs` structure to correctly align the register
definitions with the actual register layout.

Previously, the DTS had to manually offset the base address by
0x10, introducing a special case in Zephyr's Davinci GPIO driver.
This change eliminates the need for that workaround
Adding the paddingi also help to maintain a similarly with also
to the linux counterpart.

Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
2025-05-08 19:50:31 +02:00
Luca Burelli
dbf00bfca8 yaml: save intermediate files in the build directory
Make sure to provide full paths when saving the intermediate files in
the YAML export, to prevent them from being saved in the source tree.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
2025-05-08 19:46:18 +02:00
Fabio Baltieri
ea16d0e25d Revert "ci: workflows: check for manifest dnm in the manifest workflow"
This reverts commit 370e0882cb, the
condition is evaluated at workout creation time so this does not work at
all, plus some conditions don't have a label removal logic so pairing
this with the manifest run does not work anyway.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2025-05-08 19:46:03 +02:00
Johan Hedberg
af77efb77e Bluetooth: Host: Remove unnecessary ifdef from cs.c
The building of cs.c based on the respective Kconfig option is already
taken care of CMakeLists.txt, so it's redundant to try to protect the code
through ifdefs in the c-file as well.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
2025-05-08 15:56:35 +02:00
Seppo Takalo
673853ae5a drivers: eth: native_tap: Init MAC properly
Set static or random MAC before calling net_linkaddr_set().

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2025-05-08 15:56:27 +02:00
Erwan Gouriou
2593d9409e MAINTAINERS: Add avolmat-st as collaborator in Drivers: Video
Adding Alain Volmat (avolmat-st) as collaborator in Drivers: Video

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2025-05-08 15:56:19 +02:00
Arkadiusz Balys
a669ba5623 doc: releases: Add release note entry for OpenThread update
Add an entry to the release note to inform about the new
CONFIG_OPENTHREAD_SYS_INIT Kconfig option.

Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
2025-05-08 15:56:11 +02:00
Arkadiusz Balys
ca40f410ac openthread: Change log level to PLATFORM in OpenThread platform
Stop using L2 log level in OpenThread platform files.

Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
2025-05-08 15:56:11 +02:00
Arkadiusz Balys
9a5f4b97bd openthread: Add possibility to initialize OpenThread in POST_KERNEL
The new CONFIG_OPENTHREAD_SYS_INIT Kconfig option allows OpenThread
to be automatically initialised during the Zephyr POST_KERNEL
initialisation stage.

If Zephyr's L2 layer OpenThread implementation is enabled, the
IEEE802.15.4 shim layer initialises OpenThread in the POST_KERNEL
phase. However, since Openthread may work without Zephyr's L2
layer, in this case, no object can initialise it automatically.
This new Kconfig option may help start OpenThread automatically
if the L2 Layer is disabled.

Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>
2025-05-08 15:56:11 +02:00
Vignesh Pandian
d750daa2bb west: fix for west flash --context with sysbuild.
Fix west flash --context fails for Sysbuild projects issue.

Signed-off-by: Vignesh Pandian <vignesh@aerlync.com>
2025-05-08 15:56:02 +02:00
Robert Lubos
1c46508c54 tests: net: dhcpv4: client: Verify Request xid
According to RFC 2131 Request message Exchange ID should be the same as
the one received in the Offer message from the server. Modify test to
verify that.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-08 15:55:55 +02:00
Robert Lubos
eabeb84350 tests: net: dhcpv4: client: Verify that Pad option is handled
Add Pad option to the DHCP packets generated by the fake server, to
verify the client processes them correctly.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-08 15:55:55 +02:00
Robert Lubos
45a1cf7fcc net: dhcpv4: client: Do not generate new xid for Request message
According to RFC 2131, DHCP clients should use the same xid as
received in the Offer message when sending DHCP Requests. Therefore,
when generating DHCP Request message, the xid value should not be
incremented.

One vague topic is whether the xid value should be updated when
sending Requests from Renewing or Rebinding states, however RFC makes no
exception for those states, and other implementations (dhclient, lwip)
seem to reuse the same xid in such cases, so comply with this behavior.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-08 15:55:55 +02:00
Robert Lubos
9d54465559 net: dhcpv4: client: Handle Pad option
Pad option (option code 0) can be present in between other options for
alignment. The option has a fixed 1-byte length (i. e. no length field),
therefore it did not fall under the common processing code for
unrecognized options (which include the length field at the second
byte). Therefore, not processing this option explicitly could disturb
other options processing, as the parser would wrongly interpret the next
option code as the length field. This commit adds Pad option handling to
fix the issue.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-08 15:55:55 +02:00
Robert Lubos
f4408c088c net: dhcpv4: client: Prevent asserting on malformed message
In case the received DHCP message is malformed and contains invalid
message type, the code responsible for matching message type with a
string would assert. This shouldn't be the case that external conditions
(like receiving malformed packet) trigger asserts in the system.
Therefore modify that code, to return "invalid" string in such case
instead.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-05-08 15:55:55 +02:00