Commit Graph

71 Commits

Author SHA1 Message Date
Fabio Baltieri
def230187b test: fix more legacy #include paths
Add a bunch of missing "zephyr/" prefixes to #include statements in
various test and test framework files.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-08-02 16:41:41 +01:00
Guo Lixin
dada9ea54b tests: kernel: gen_isr_table: move to new ztest API
Move tests/kernel/gen_isr_table/ to use new ztest API.

Signed-off-by: Guo Lixin <lixinx.guo@intel.com>
2022-07-11 13:23:27 +02:00
Carlo Caione
3a5e54d602 gen_isr_table: Exclude m2gl025_miv from test
Apparently m2gl025_miv does not support vectored mode. Exclude from
test.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-07 10:00:20 +02:00
Carlo Caione
fe19420f93 test: gen_isr_table: Fix test for RISCV
Fix this test adding a proper support for RISCV when in vectored mode
with IRQ vector table generation.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-07 10:00:20 +02:00
Gerard Marull-Paretas
ade7ccb918 tests: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 20:02:14 +02:00
Torsten Rasmussen
2760fb9eda tests: added kernel tests for arm arch with linker script generator
This commit adds an additional test case for several kernel test suites
to ensure that the linker script generator is working correctly for a
subset of the Zephyr test suites.

The ensures that the basic functionality of the linker script generator
is working while still keep the performance impact on CI at a minimal
level.

Using the kernel tests is a trade-off between testing coverage of the
linker script generator and the time it takes to complete CI.

The kernel tests is considered to have the broadest coverage of various
features important for the generated linker script.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-30 08:54:23 -04:00
Torsten Rasmussen
1cccc8a8fe cmake: increase minimal required version to 3.20.0
Move to CMake 3.20.0.

At the Toolchain WG it was decided to move to CMake 3.20.0.

The main reason for increasing CMake version is better toolchain
support.

Better toolchain support is added in the following CMake versions:
- armclang, CMake 3.15
- Intel oneAPI, CMake 3.20
- IAR, CMake 3.15 and 3.20

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2021-08-20 09:47:34 +02:00
Mulin Chao
38eaabc9c7 tests: kernel: gen_isr_table: Add workaround for npcx9 series.
Both NPCX7/9 uses the IRQs at the end of the vector table, for example,
the IRQ 60 and 61 used for Multi-Input Wake-Up Unit (MIWU) devices by
default, and conflicts with ISR used for testing.

This CL changes TEST_NUM_IRQS (The value is changed from 46 to 44) to
move IRQ used for this test suite from 42 to 40 which is reserved in
both NPCX7 and NPCX9 series to resolve the issue.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-06-08 00:40:14 -04:00
Ioannis Glaropoulos
d105a2b76c arm: shrink names for null-pointer exception detection Kconfigs
Reduce the length of the Kconfig defines related to
null-pointed dereference detection in Cortex-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-26 12:30:05 -05:00
Henrik Brix Andersen
aa78a6473b tests: kernel: gen_isr_table: do not use IRQ 57 on NXP LPC55S16
IRQ 57 is reserved in the NXP LPC55S16 SoC. Thus, limit the number of
interrupts reported to the test, so that it does not try to use it.

Fixes #34915

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2021-05-19 16:16:32 -05:00
Thomas Stranger
32fe8a23af tests: gen_isr_table: nucleo_g071rb: decr. NUM_IRQS to avoid conflicts
After the introduction of usart1 the kernel/genisr_table test could
no longer build, due to an interrupt conflict.
Adopt the TEST_NUM_IRQS to resolve the conflict.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-04-26 14:16:03 -04:00
Enjia Mai
95cddd4df7 testsuite: utils: move the interrupt_util.h into testsuite
The interrupt_util.h provides utils of trigger irq, now move them into
testsuite. All of the needed test cases can make use of them.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2021-03-30 08:18:23 -04:00
Eugeniy Paltsev
106528e48e tests: interrupts: generalize ARC-specific part for all ARC CPUs
Generalize ARC-specific interrupt triggering for all ARC CPUs
instead of ARCv2 only.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2021-03-25 07:23:02 -04:00
Kumar Gala
53b104d461 tests: kernel: Add missing kernel tag to tests
Add kernel to any testcase.yaml files that happen to be missing for
tests under tests/kernel/

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-05 14:52:55 -05:00
Ioannis Glaropoulos
1b22f6b8c8 arm: cortex_m: enable null-pointer exception detection in the tests
Enable the null-pointer dereferencing detection by default
throughout the test-suite. Explicitly disable this for the
gen_isr_table test which needs to perform vector table reads.
Disable null-pointer exception detection on qemu_cortex_m3
board, as DWT it is not emulated by QEMU on this platform.
Additionally, disable null-pointer exception detection on
mps2_an521 (QEMU target), as DWT is not present and the MPU
based solution won't work, since the target does not have
the area 0x0 - 0x400 mapped, but the QEMU still permits
read access.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-03 10:38:29 +01:00
Wealian Liao
a92ae82355 test: fix gen_isr_table for npcx soc
gen_isr_table uses 6 IRQs for testing. Originally, it uses IRQ 41-36.
However, the IRQ37 & 36 are enabled by other modules in NPCX chips.
Change TEST_NUM_IRQS to use 45-40 for the test.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-02-24 11:02:32 -05:00
Wu Han
df8f6c282b tests: kernel: gen_isr_table: Exclude stm32f103_mini board
This test is not suitable for stm32f103

Signed-off-by: Wu Han <wuhanstudio@qq.com>
2020-12-03 10:54:38 -06:00
Enjia Mai
90e6f21d20 tests: modify the test case gen_isr_table using ztest
Modify the gen_isr_table test case to using ztest. Although it was
split up to three test cases, the test logic and the tested platform
are totally the same as previous one.

Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
2020-10-30 15:57:03 +01:00
Christopher Friedt
310d149d8b boards: cc1352r_sensortag: add support for TI CC1352R SensorTag
The TI CC1352R SensorTag (LPSTK-CC1352R) is a development kit that
features the CC1352R SoC.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-10-08 16:08:36 -04:00
Eugeniy Paltsev
effd2fa834 toolchain: define __no_optimization attribute across toolchains
The __attribute__((optimize("-O0"))) attribute is used to disable
optimization of some test functions. ARC MWDT toolchain doesn't
support it, however it supports __attribute__((optnone)) with
similar functionality.

Define __no_optimization attribute across all toolchains so it
can be used in tests.

NOTE: we don't define __no_optimization for XCC as it includes
GCC header with __no_optimization defined.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-10-06 11:41:23 -04:00
Flavio Ceolin
cc0244bdd7 tests: gen_isr_table: Disable tables generation
Add a new sample disabling GEN_ISR_TABLES.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-29 12:36:33 +02:00
Tomasz Bursztyka
4dcfb5531c isr: Normalize usage of device instance through ISR
The goal of this patch is to replace the 'void *' parameter by 'struct
device *' if they use such variable or just 'const void *' on all
relevant ISRs

This will avoid not-so-nice const qualifier tweaks when device instances
will be constant.

Note that only the ISR passed to IRQ_CONNECT are of interest here.

In order to do so, the script fix_isr.py below is necessary:

from pathlib import Path
import subprocess
import pickle
import mmap
import sys
import re
import os

cocci_template = """
@r_fix_isr_0
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
(
 const struct device *D = (const struct device *)P;
|
 const struct device *D = P;
)
 ...
}

@r_fix_isr_1
@
type ret_type;
identifier P;
identifier D;
@@
-ret_type <!fn!>(void *P)
+ret_type <!fn!>(const struct device *P)
{
 ...
 const struct device *D;
 ...
(
 D = (const struct device *)P;
|
 D = P;
)
 ...
}

@r_fix_isr_2
@
type ret_type;
identifier A;
@@
-ret_type <!fn!>(void *A)
+ret_type <!fn!>(const void *A)
{
 ...
}

@r_fix_isr_3
@
const struct device *D;
@@
-<!fn!>((void *)D);
+<!fn!>(D);

@r_fix_isr_4
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
(
-const struct device *D = (const struct device *)P;
|
-const struct device *D = P;
)
 ...
}

@r_fix_isr_5
@
type ret_type;
identifier D;
identifier P;
@@
-ret_type <!fn!>(const struct device *P)
+ret_type <!fn!>(const struct device *D)
{
 ...
-const struct device *D;
...
(
-D = (const struct device *)P;
|
-D = P;
)
 ...
}
"""

def find_isr(fn):
    db = []
    data = None
    start = 0

    try:
        with open(fn, 'r+') as f:
            data = str(mmap.mmap(f.fileno(), 0).read())
    except Exception as e:
        return db

    while True:
        isr = ""
        irq = data.find('IRQ_CONNECT', start)
        while irq > -1:
            p = 1
            arg = 1
            p_o = data.find('(', irq)
            if p_o < 0:
                irq = -1
                break;

            pos = p_o + 1

            while p > 0:
                if data[pos] == ')':
                    p -= 1
                elif data[pos] == '(':
                    p += 1
                elif data[pos] == ',' and p == 1:
                    arg += 1

                if arg == 3:
                    isr += data[pos]

                pos += 1

            isr = isr.strip(',\\n\\t ')
            if isr not in db and len(isr) > 0:
                db.append(isr)

            start = pos
            break

        if irq < 0:
            break

    return db

def patch_isr(fn, isr_list):
    if len(isr_list) <= 0:
        return

    for isr in isr_list:
        tmplt = cocci_template.replace('<!fn!>', isr)
        with open('/tmp/isr_fix.cocci', 'w') as f:
            f.write(tmplt)

        cmd = ['spatch', '--sp-file', '/tmp/isr_fix.cocci', '--in-place', fn]

        subprocess.run(cmd)

def process_files(path):
    if path.is_file() and path.suffix in ['.h', '.c']:
        p = str(path.parent) + '/' + path.name
        isr_list = find_isr(p)
        patch_isr(p, isr_list)
    elif path.is_dir():
        for p in path.iterdir():
            process_files(p)

if len(sys.argv) < 2:
    print("You need to provide a dir/file path")
    sys.exit(1)

process_files(Path(sys.argv[1]))

And is run: ./fix_isr.py <zephyr root directory>

Finally, some files needed manual fixes such.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
50edd19f3a tests: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Mulin Chao
fb1c2b58ac tests: kernel: gen_isr_table: Add workaround for npcx7m6fb soc.
In NPCX7M6FB, it uses some the IRQs at the end of the vector table,
for example, the irq 60 and 61 used for Multi-Input Wake-Up Unit (MIWU)
device by default, and conflicts with isr used for testing. Moving IRQs
for this test suite to solve the issue.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-09-01 13:35:25 +02:00
Anas Nashif
dca317c730 sanitycheck: inclusive language
change whitelist -> allow.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-27 07:04:07 -04:00
Ioannis Glaropoulos
f9e1ef9684 tests: kernel: gen_isr_table: extend test for Cortex-M Baseline
Extend the gen_isr_table test suite to build and run
on Cortex-M baseline platforms. Add a few platforms
in the whitelist so the test builds and runs for some
common Baseline Cortex-M insluding the QEMU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-27 11:11:48 +02:00
Ioannis Glaropoulos
98ad9d4a77 tests: kernel: gen_isr_table: yml fixes for ARC test variant
Adding tags for ARC-variant of the test.
Rename test string to comply with ARM-variant name.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-27 11:11:48 +02:00
Josep Puigdemont
7cafe7e74b boards: arm: olimex stm32-h103: Add board
The Olimex STM32-h103 is a development board based on the STM32F103RB,
very similar to the stm32_mini, which was used as a reference for the
pinmux configuration.

Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
2020-07-24 14:48:07 +02:00
Maureen Helm
5c603d9edf tests: gen_isr_table: Disable gpio on lpcxpresso54114
One of the interrupts used by the gen_isr_table test conflicts with a
gpio interrupt on the lpc54114 soc, so disable gpio for this test on the
corresponding board. We do this for only the m4 core because the test is
not supported on the m0 core.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-07-11 08:49:50 -04:00
Andrzej Głąbek
8da1736c67 tests/kernel/gen_isr_table: Add special config for nRF5340 and nRF9160
In nRF9160 and application core in nRF5340, not all interrupts with
highest numbers are implemented. Thus, limit the number of interrupts
reported to the test, so that it does not try to use some unavailable
ones.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-07-08 12:37:58 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Marc Herbert
debade9121 tests: make find_package(Zephyr...) REQUIRED
... because it is (required).

This makes a difference when building with CMake and forgetting
ZEPHYR_BASE or not registering Zephyr in the CMake package registry.

In this particular case, REQUIRED turns this harmless looking log
statement:

-- Could NOT find Zephyr (missing: Zephyr_DIR)
-- The C compiler identification is GNU 9.3.0
-- The CXX compiler identification is GNU 9.3.0
-- Check for working C compiler: /usr/bin/cc
-- ...
-- ...
-- ...
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Error at CMakeLists.txt:8 (target_sources):
  Cannot specify sources for target "app" which is not built by
  this project.

... into this louder, clearer, faster and (last but not least) final
error:

CMake Error at CMakeLists.txt:5 (find_package):
  Could not find a package configuration file provided by "Zephyr" with
  any of the following names:

    ZephyrConfig.cmake
    zephyr-config.cmake

  Add the installation prefix of "Zephyr" to CMAKE_PREFIX_PATH or set
  "Zephyr_DIR" to a directory containing one of the above files.  If
  "Zephyr" provides a separate development package or SDK, be sure it
  has been installed.

-- Configuring incomplete, errors occurred!

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-05-29 10:47:25 +02:00
Wayne Ren
e0470d0f93 tests: add a workaround for arc emsdp
arc emsdp's console will use irq 108/107 which will
conflict with irqs used in tests (emsdp has 112 irqs),
so add a workaround for emsdp.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-05-21 10:59:36 +02:00
Torsten Rasmussen
407b49b35c cmake: use find_package to locate Zephyr
Using find_package to locate Zephyr.

Old behavior was to use $ENV{ZEPHYR_BASE} for inclusion of boiler plate
code.

Whenever an automatic run of CMake happend by the build system / IDE
then it was required that ZEPHYR_BASE was defined.
Using ZEPHYR_BASE only to locate the Zephyr package allows CMake to
cache the base variable and thus allowing subsequent invocation even
if ZEPHYR_BASE is not set in the environment.

It also removes the risk of strange build results if a user switchs
between different Zephyr based project folders and forgetting to reset
ZEPHYR_BASE before running ninja / make.

Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
2020-03-27 16:23:46 +01:00
Carlo Caione
aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Vincent Wan
94140b6816 tests: kernel: gen_isr_table: exclude from testcase.yaml
Excluding this test for cc13x2/cc26x2 platforms where ISR4 is not
available for it to use.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-12-17 13:48:25 -05:00
Andrew Boie
4f77c2ad53 kernel: rename z_arch_ to arch_
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Maksim Masalski
d85b45b072 tests: updated names for the arch interrupt tests
Test case arch.interrupt have same test case name
for different architectures. To get rid of it,
I decided to change test cases names.

Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2019-10-23 23:13:13 -04:00
Stephanos Ioannidis
5806787ae1 tests: kernel: Fix incorrect interrupt controller type inference.
The current implementation of kernel interrupt tests incorrectly
infers NVIC, which is specific to Cortex-M, from CONFIG_ARM.

This commit fixes such incorrect NVIC inferences by using
CONFIG_CPU_CORTEX_M instead of CONFIG_ARM.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-10-22 15:07:52 -07:00
Wayne Ren
482b993b88 tests: add the case for ARC in yaml
* add the case for ARC in yaml after dynamic and direct irq are
  supported
* fix the bug that index in sw_isr_table should have a offset of
  CONFIG_GEN_IRQ_START_VECTOR

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-10-21 09:06:17 -07:00
Nicolas Pitre
1f4b5ddd0f riscv32: rename to riscv
With the upcoming riscv64 support, it is best to use "riscv" as the
subdirectory name and common symbols as riscv32 and riscv64 support
code is almost identical. Then later decide whether 32-bit or 64-bit
compilation is wanted.

Redirects for the web documentation are also included.

Then zephyrbot complained about this:

"
New files added that are not covered in CODEOWNERS:

dts/riscv/microsemi-miv.dtsi
dts/riscv/riscv32-fe310.dtsi

Please add one or more entries in the CODEOWNERS file to cover
those files
"

So I assigned them to those who created them. Feel free to readjust
as necessary.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2019-08-02 13:54:48 -07:00
Siddharth Chandrasekaran
b070bbd888 tests: kernel: Exclude platforms stm32_min_dev_*
Exclude the two variants of smt32_min_dev (stm32_min_dev_black and
stm32_min_dev_blue) from kernel tests.

Signed-off-by: Siddharth Chandrasekaran <siddharth@embedjournal.com>
2019-04-26 03:34:45 -07:00
Anas Nashif
3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt
4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Kumar Gala
1f59e9e825 tests: kernel: gen_isr_table: Exclude platforms test isnt valid on
The test assumes that the last to IRQ number will be free, this isn't a
valid assumption and now that we detect multiple ISRs registering for
the some IRQ line, we see failures because of this assumption on some
platforms.  Exclude those platforms from this test for the time being.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-12 15:35:29 -05:00
Anas Nashif
a93651085e boards: remove pulpino board
This board is unmaintained and unsupported. It is not known to work and
has lots of conditional code across the tree that makes code
unmaintainable.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-01-31 22:47:18 -05:00
Anas Nashif
5060ca6a30 cmake: increase minimal required version to 3.13.1
Move to latest cmake version with many bug fixes and enhancements.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-01-03 11:51:29 -05:00
Andrew Boie
3aa59a6eed tests: test dynamic IRQ APIs
The gen_isr_table test now tries to install two dynamic
IRQ handlers.

RISCV32 has a workaround due to limited number of SW
triggerable interrupts that can be configured.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-20 09:30:34 -05:00
Reto Schneider
7eabab2f5d samples, tests: Use semi-accurate project names
When using an IDE (e.g. Eclipse, Qt Creator), the project name gets
displayed. This greatly simplifies the navigation between projects when
having many of them open at the same time. Naming every project "NONE"
defeats this functionality.

This patch tries to use sensible project names while not duplicating
too much of what is already represented in the path. This is done by
using the name of the directory the relevant CMakeLists.txt file is
stored in. To ensure unique project names in the samples (and again, in
the tests folder) folder, small manual adjustments have been done.

Signed-off-by: Reto Schneider <code@reto-schneider.ch>
2018-10-27 21:31:25 -04:00
Maureen Helm
3e41864e25 tests: gen_isr_table: Add barriers after triggering the irq
Fixes the gen_isr_table kernel test on mimxrt1050_evk by using data and
instruction synchronization barriers instead of disabling compiler
optimization on arm platforms. According to [1] section 4.5, "if a
pended interrupt request needs to be recognized immediately after being
enabled in the NVIC, add a DSB instruction and then an ISB instruction"

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0321a/BIHJDAAE.html

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-08-29 18:48:42 -04:00