In order to bring consistency in-tree, migrate all subsystems code to
the new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This adds basic support for GDB stub on Xtensa. Note that
this only provides the common bits on the architecture side.
SoC support is also required to fully enable GDB stub on
each Xtensa SoC.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds the architecture interface so that the GDB stub can
deal with breakpoints and watchpoints. By default, weak
functions are implemented to indicate breakpoints and
watchpoints are not supported.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some architectures may require memory accessed to be aligned to
certain size and cannot be accessed byte-by-byte during memory
read/write in GDB stub. This adds the ability to specify
the alignment via kconfig. The existing byte-by-byte access is
retained as it is simplier code.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds bits for architectures, SoCs or boards to restrict
memory access in GDB stub. This is mainly to make sure
GDB stub only read/write to memory that can be legally accessed
without resulting in memory faults.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Storing the state where this is the first GDB break can be done
in the main GDB stub code. There is no need to store the state
in architecture layer.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds a new function gdb_bin2hex() to convert binary into
hexadecimal string representation. This is similar to
bin2hex() but does not force a null character at the end
of the output buffer. This avoids an issue where the last
character of the hexadecimal string is replaced with
null character before sending to GDB.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There is no need to bail out of the debugging session if there
are recoverable errors, for example, erroneous GDB packet
received, cannot write to certain registers, etc. So simply
send an error message to GDB and continue the GDB stub main
loop for more debugging.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds architecture-specific functions to read/write registers.
This allows architecture to have a sparse representation of
the register file as not all registers are saved during context
switches. This saves some runtime space, and provides some
flexibility on what architectures can do.
Remove from header the need to define ARCH_GDB_NUM_REGISTERS as
it is no longer used in the common gdbstub code.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
If an incoming GDB packet is bigger than what the buffer can hold,
stop putting the extra characters into the buffer. This will still
read till the end to acknowledge the packet but will return error
instead. This allows the GDB session to continue instead of hanging
or timed out due to packets not being acknowledged.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a kconfig to specify the buffer size for GDB packet
I/O. Some architectures may need a bigger buffer for the general
register packet, and we don't want it to overflow our buffer.
This also changes the packet read/write buffer to be allocated
outside of stack. Since the buffer can be large enough that it
won't fit inside the stack.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GDB on host may ask the guest to read the a pointer contents even if
it is pointing to NULL. Send an error code when this occurs.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
It implements gdb remote protocol to talk with a host gdb during the
debug session. The implementation is divided in three layers:
1 - The top layer that is responsible for the gdb remote protocol.
2 - An architecture specific layer responsible to write/read registers,
set breakpoints, handle exceptions, ...
3 - A transport layer to be used to communicate with the host
The communication with GDB in the host is synchronous and the systems
stops execution waiting for instructions and return its execution after
a "continue" or "step" command. The protocol has an exception that is
when the host sends a packet to cause an interruption, usually triggered
by a Ctrl-C. This implementation ignores this instruction though.
This initial work supports only X86 using uart as backend.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
