The ARC <soc.h> headers are no longer used, so they can be removed.
Refer to the previous commits for more context.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The soc.c source only contains code relevant to SMP, and in fact, it is
a file that is left empty when pre-processed from a compiler perspective
if CONFIG_SMP=n. This change renames it to smp.c to make it clear it
contains SMP related code, and, it compiles it conditionally to
CONFIG_SMP=y.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
ICI (Inter-Core Interrupt Unit) interrupts and priorities were hardcoded
in C files. This patch moves this information to Devicetree and updates
code to make use of it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
sysconf base address was hardcoded in <soc.h>. Create a new compatible
and define it in Devicetree, where hardware needs to be described.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The definitions provided by this file seem to be unused throughout the
tree, so remove it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe secure timer0 instead of hardcoding values in
<soc.h>.
DT files have been structured to match the following requirements: In
case of sectimer0 - it's should be only enabled for:
- emsdp_em7d_esp.dts
- em_starterkit_em7d.dts
- nsim_sem_mpu_stack_guard.dts
- nsim_sem.dts
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Include what is necessary: <zephyr/init.h> and a platform specific
architecture header.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The HAS_I2C_DW was to limit Kconfig visibility to only platforms
that utilize the I2C DW IP. The Kconfig for I2C_DW depends on
DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED which will cause the same
visbility limitation to only platforms that have I2C DW devicetree
nodes. Thus we can remove HAS_I2C_DW and its references.
Signed-off-by: Kumar Gala <galak@kernel.org>
Now that serial drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the serial.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.
Signed-off-by: Kumar Gala <galak@kernel.org>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
NS16550 driver no longer relies on definitions found in <soc.h>, SoC can
select UART_NS16550_ACCESS_IOPORT instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add nSIM-based (simulator) boards with
* nsim_hs5x - single core ARCv3 HS5x 32 bit CPU
* nsim_hs5x_smp - SMP, two core ARCv3 HS5x 32 bit CPU
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Linker files were not migrated with the new <zephyr/...> prefix. Note
that the conversion has been scripted, refer to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
soc_config.c for snps_nsim had no actual code, just a bunch of includes.
Deleting as it has no value (and triggered a compliance warning because
file had no newline at EOF).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently we use incorrect memory layout for SMP boards as
we put data (which need do be accessible from all cores) to
DCCM which is private for each CPU core.
This works for nSIM which doesn't simulate CCMs (as we don't pass
corresponding nSIM options for SMP configurations) however
it won't work if we run that code on real HW (we want to achieve
that nSIM configurations are also runnable on HAPS - FPGA platform).
Let's fix that issue by using DDR instead of CCMs for SMP
configurations (nsim_hs_smp and nsim_hs6x_smp).
While I'm at it - switch UP HS6x configuration (nsim_hs6x)
for DDR usage instead of CCMs - to make that configuration closer
to the HAPS config we have.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The autoconf.h header is not required because the definitions present in
the file are exposed using the compiler `-imacros` flag.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
ARC_HAS_ACCL_REGS should set to y to protect ACCL and ACCH registers
during irq. These registers could be used as GPRs by compilers and
therefore need store/restore during irq.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
We add support of mpu v6 therefore it is needed to have a board to
validate that feature. This commit add a new HS nsim simulator
which supports mpu v6.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
some mwdt compiler options not support cmake function
check_c_compiler_flag, let's add mwdt compiler options for
hsdk boards without check.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
arcmwdt toolchain has various pre build libraries, we can find it in
path: {METAWARE_HOME}/lib, and it will use av2em lib by default.
it's OK for em boards, but not suitable for hs boards. I have tested
hs38_full library for hs boards, it's OK. let's use it.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Add QEMU board with single core ARCv3 HS6x 64 bit CPU
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Don't allow user to choose CPU_ARCEM / CPU_ARCHS options
but select them when exact CPU type (i.e. EM4 / EM6 / HS3X/ etc)
is chosen.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
ARC mpu version used a wrong number 3, could cause conflict in future.
This commit fix this issue to version number 4.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
This allows to get much more reproducible results in terms of
amount of tests passed & failed.
But note it requires QEMU for ARC with icount support!
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
The new APIs are not only dealing with cache flushing. Rename the
Kconfig symbol to CACHE_MANAGEMENT to better reflect this change.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
As discuss in PR #28805, sloppy idle function still has some bug and
barely used, so we can remove it safely.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
0.5 Mhz with 100 ticks per sec leaves 5000 cycles per tick,
which broke some tests that assumed more work within 1 tick.
Set to 1 Mhz: balance multi-core simulation speed and tick duration.
Fixes#27943
Signed-off-by: Ruud Derwig <Ruud.Derwig@synopsys.com>
Typically we have ARC core configurations where Fast IRQs (FIRQ) are
enabled together with multiple register files and those we have covered
by testing. But FIRQ & single register bank we only happen to have on
the older EMSK v2.2.it might be a good idea to add a similar
configuration to nSIM "boards" so that we keep it tested regularly.
nsim_em7d_v22 configuration is similar with em_staterkit_em7d_v22,
both configed with FIRQ & single register bank.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
