All in tree device drivers use some form of DEVICE_DT_GET
so we no longer need to require label properties.
Signed-off-by: Kumar Gala <galak@kernel.org>
HDA is a common IP used across the entire ADSP line and deserves
a name respecting that alongside similiar IP drivers such as the
ADSP GPDMA driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
All in tree device drivers on a bus use some form of DEVICE_DT_GET
so we no longer need to require label properties.
Signed-off-by: Kumar Gala <galak@kernel.org>
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This will add ace compatible DMA driver.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Bindings for Intel HDA now require the buffer alignment property to be
set.
Sets the property to 128 bytes for the common Intel cAVS device tree as
was implied by the tests cases.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Enable statically allocated buffers to determine their buffer alignment
with a device tree property rather than having to find out through docs.
Should save people lots of time.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds hda link in and out drivers. The link in and link
out channels of HDA have small differences
with the host channels. Updates the existing
cavs_hda drivers and code to account for these
differences.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.
Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF
Simple test case is provided for both drivers.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The type of DMA for the stm32f0 devices was wrong
Its DMA is of type V2bis where the peripheral request is fixed.
The corresponding DMA cell has 2 elements.
The stm32f091 has two DMA instances.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This will define a new bindings for any stm32 dma feature
Depending on the soc family, the DMA is of V1 or V2 or Vbis type
And give a factored definition for feature
The difference is on the dma-cell structure.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The DMA bindings had duplicate description: keys. Merge the two
descriptions into one to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Conver the NIOS-II mSGDMA driver to be devicetree based. Add node for
dma controller into nios2f.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
"st,mem2mem" property is supposed to be limited to dma-v1.
Remove its use in dma-v2 components.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2 versions of DMA hardware blocks could be found across stm32 series.
In order to simplify the handling of matching Kconfig symbols,
make this visible in dts files by creating "st,stm32-dma-v1" and
"st,stm32-dma-v2" and set them accordingly in dtsi files.
Duplicate and update related bindings to reflect that new state.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Currently, the only user of the Designware DMA controller
only needs the channel property. So make dma-cells to be
constant of 1.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add dma-cells property in pl330 dma binding document.
Currently only one integer cell with "channel" name is
added in order for the client to specify channel id
to be used for data transfer out of available channels.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
The DMA bindings had duplicate description: keys. Merge the two
descriptions into one to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The DMA channel number used for the DMA transfer can now
be specified from the device tree config files
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Convert sam_xdmac driver to utilize devicetree. As part of the
controller binding we specify that dmas should contain a channel and the
perid for the DMA transaction.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch introduces the periph to/from memory dma transfer
using the dmamux feature and define new values
for dma cells on client side
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This includes the dma cells as client for the spi
An example of the client part is defined in the dma.yaml
Consequently, bindings for the dmas property becomes then 'not required'
Including dma.yaml is not needed as dma properties
are now part of base.yaml
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move the atmel,sam0-dmac binding under the dma binding dir and add
cell information for channel and trigger source. Update the associated
dtsi files to match these changes.
This is in prep of ATMEL SAM0 SERCOMM devices like UART, I2C, and SPI to
user proper 'dmas' property to specify the dma info to use.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
dmas and dma-names properties could be used by a wide range
of potential dma client, hence put them in base.yaml, as
optional properties.
Since current stm32-i2s driver implementation only support
dma, set these properties as required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This patch introduces the periph to/from memory dma transfer
define new values for dma cells on client side
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This checks if the DMA controller supports or not
the memory-to-memory transfers. For DMA Version1,
in the stm32f2xx, stm32f4xx, stm32f7xx series,
only DMA instance 2 is able to transfer mem-to-mem.
For other series, with DMA Version2, there is no such a limitation.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add any useful information from 'title:' to the 'description:' strings
(e.g. explanations of acronyms), and remove 'title:' as well as any
copy-pasted "this binding gives a ..." boilerplate.
Also clean some description strings up a bit.
Some other things could probably be cleaned up (replacing 'GPIO node'
with 'GPIO controller' on controllers for consistency, for example), but
I kept things close to the original to avoid accidentally messing up.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit moves DMA parameters previously hard coded in the driver
to the dts.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a yaml file for help describing generic dma controllers.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
