Commit Graph

4 Commits

Author SHA1 Message Date
Anas Nashif
728d8eb2c0 intel_adsp: rename clock registers due to possible conflict
SOF using the same defines and in some cases generating conflicts.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-28 14:11:23 -04:00
Anas Nashif
2af59e7d44 intel_adsp: unify timer registers and simplify timer driver
Declare clock control in the shim header per SoC and remove ifdeffry
from the driver simplifiying it and making it ready for the next
platform.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-21 17:55:41 -04:00
Anas Nashif
423264b96b intel_adsp: make shim header soc specific
using once single header to support multiple socs and product
generations is error prone and not easily maintained.

Over time we have been adding conditional code in headers and extending
structs  to support new HW features which becomes a problem.

Goal is to keep platform headers in sync with hardware specification and
allow of introduction of new platforms and hardware features by just
introducing a new SoC with its own set of headers.

This is now just a copy of existing cavs-shim.h with slight changes,
goal is to clean this up long term and sync with hardware datasheets and
align on naming as well.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-21 17:55:41 -04:00
Flavio Ceolin
e4a3e2d8b6 intel_adsp: Unify cavs and ace timers
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-07-06 15:11:07 -04:00