Commit Graph

7 Commits

Author SHA1 Message Date
Tomasz Bursztyka
1ae95546c8 drivers/interrupt_controller: Add a VT-D option to disable src id check
Theoretically, source id check is not mandatory in the context we use
VT-D here (i.e. non VM one, just multi-vector MSI support)

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-07 10:47:27 -05:00
Tomasz Bursztyka
49a4bb32da drivers/interrupt_controller: Enable VT-D by default under condition
VT-D will only be enabled if MSI multi-vector will also be requested,
on x86_64, for all boards BUT QEMU ones.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-07 10:47:27 -05:00
Tomasz Bursztyka
cf18ecd09f drivers/interrupt_controller: No VT-D if no PCIE MSI multi-vector
There is no point to enable VT-D if PCIE MSI multi-vector support is not
requested, as VT-D is uniquely being used to remap MSI multi-vector
based interrupts.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-07 10:47:27 -05:00
Tomasz Bursztyka
149cef11ce drivers/interrupt_controller: VT-D may manipulate the cache
Depending on a VT-D capability, it might be necessary to flush objects
from the cache.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-07 10:47:27 -05:00
Tomasz Bursztyka
610aeb9d42 drivers/interrupt_controller: Intel VT-D init should happen after ioapic
Or then it will badly crash trying to set up the fault event isr
handler.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-07 10:47:27 -05:00
Tomasz Bursztyka
aa6112d0af drivers/interrupt_controller: Enable xapic pass-through in intel vt-d
In XAPIC mode, it's possible to tell VT-D to let interrupt in compatible
format passing through.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-01-07 10:47:27 -05:00
Tomasz Bursztyka
557b17076f drivers/interrupt_controller: Add Intel VT-D interrupt remapping driver
Such interrupt remapping controller may be found along with Intel VT-D
hardware. Its base-address is via ACPI, and it enables up to 64K
interrupt indexes.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-12-08 09:29:20 -05:00