This commit adds the `no_strict_aliasing` flag, which disables
the strict aliasing rule, for the GCC compiler and its derivatives.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Some processors support Dual-redundant Core Lock-step
DCLS) topology but the processor still can be ran in
split-lock mode (by default or changed at flash time).
So, introduce config DCLS that is enabled by default if
config CPU_HAS_DCLS is set, it should be disabled if
processor is used in split-lock mode.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Compilation warnings appears for C++ files, that following
options are not valid:
-ffrestanding,
-Wno-format-zero-length
-Wno-main
-fgnu89-inline
-std-gnu99
Added checks to filter out unsupported flags.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This patch is doing several things:
- Core ISA and extension Kconfig symbols have now a formalized name
(CONFIG_RISCV_ISA_* and CONFIG_RISCV_ISA_EXT_*)
- a new Kconfig.isa file was introduced with the full set of extensions
currently supported by the v2.2 spec
- a new Kconfig.core file was introduced to host all the RISCV cores
(currently only E31)
- ISA and extensions settings are moved to SoC configuration files
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
When SYSROOT_DIR is provided, gcc should use it through the --sysroot=
option otherwise some commands won't work as expected.
For example, in the Yocto environment when cross compiling,
--print-libgcc-file-name prints only "libgcc.a" instead of the full
path to it and the subsequent assert_exists(LIBGCC_FILE_NAME) will
fail.
Fixes#45578
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
Current Espressif porting requires standard include as
part of hal implementation. compiler_flags.cmake checks for
variant name to keep those stdinc in build.
Instead of using variant name as check, use this new CONFIG
to make it clear and to allow having toolchain integrated
in zephyr-sdk package.
stdinc dependency in hal_espressif will be worked out and removed
soon.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
When Dual-redundant Core Lock-step (DCLS) topology is used, the VFP
registers across the two redundant cores must be manually initialised
and synchronised, and this requires the `-mfloat-abi=hard` option to
be specified.
This commit forces the use of FP "hard" ABI on the VFP-equipped cores
that are configured in DCLS topology.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Zephyr build system to support specifying
advanced floating-point compilation options derived from the newly
introduced unified floating-point configurations.
The following changes are introduced by this commit:
1. Specify architecture floating-point option to the `-mcpu` flag.
2. Specify floating-point unit (FPU) type using the `-mfpu` flag.
Note that the `-march` flag is not specified separately because the
`-mcpu` flag provides more detailed architecture options and this
makes the `-march` flag redundant.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
With this adding "-DSPARSE=y" to the "west build" command line
performs a sparse check of the project build. So far only gcc-based
builds are supported.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This will generate profile data that can be analyzed using gprof. When
you build the application (currently for native_posix only), after
running the application you will get a file "gmon.out" with the call
graph which can be processed with gprof:
gprof build/zephyr/zephyr.exe gmon.out > analysis.txt
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
New KConfig options for 'A' and 'M' RISC-V extensions have been
added. These are used to configure the '-march' string used by GCC
to produce a compatible binary for the requested RISC-V variant.
In order to maintain compatibility with all currently defined SoC,
default the options for HW mul / Atomics support to 'y', but allow
them to be overridden for any SoC which does not support these.
I tested this change locally via twister agaisnt a few RISC-V platforms
including some 32bit and 64bit. To verify the 4 possibilities of Atomics
& HW Mul: (No, No), (No, Yes), (Yes, No), (Yes, Yes -- current behavior),
I used an out-of-tree GCC (xPack RISC-V GCC) which has multilib support
for rv32i, rv32ia, rv32ima to test against our out-of-tree Intel Nios V/m
processor in HW. The Zephyr SDK RISCV GCC currently does not contain
multilib support for all variants exposed by these new KConfig options.
Signed-off-by: Nathan Krueger <nathan.krueger@intel.com>
Add a compiler property for disabling pointer arithmetic warnings,
and implement that property for GCC.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
This reverts commit deeb98da53.
A less invasive change has been implemented which does not
require changes to the GCC compiler flag file. So revert
the commit.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some older versions of XCC Clang would result in the following
error during compilation:
/tmp/file.s: Assembler messages:
/tmp/file.s:20: Error: file number 1 already allocated
clang-3.9: error: Xtensa-as command failed with exit code 1
due to a bug in LLVM: https://bugs.llvm.org/show_bug.cgi?id=11740.
This is fixed in upstream, https://reviews.llvm.org/D20002, in 2016.
However, it seems that it is only fixed after XCC RI-2018.0.
Instead of blanket disabling usage of '-g', use an environment
variable "XCC_NO_G_FLAG" to disable usage of flag '-g' to workaround
this issue. This needs to be manually set because there is no way to
know which XCC version is being used, and compiler flag checking for
'-g' would not result in error (and thus '-g' is not ignored).
This is only needed for older XCC Clang. For sufficiently new XCC
verisons, there is no need for this.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit defines the toolchain command line options for the
Zephyr MIPS architectural port.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Remy Luisant <remy@luisant.ca>
After having resolved all of the instances of packed member access,
re-enable the warning.
Fixes#16587.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
This commit adds the `nostdincxx` C++ compiler property for GCC, which
is specified when the C++ standard library (`CONFIG_LIB_CPLUSPLUS`) is
disabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
For each compiler, also set a CMAKE_GCOV var referencing the appropriate
gcov tool.
Tested with gcc and host-gcc on the ChromeOS codebase.
Signed-off-by: Jeremy Bettis <jbettis@chromium.org>
This commit adds the half-precision (16-bit) floating-point
configurations to the ARM AArch32 architectures.
Enabling CONFIG_FP16 has the effect of specifying `-mfp16-format`
option (in case of GCC) which allows using the half-precision floating
point types such as `__fp16` and `_Float16`.
Note that this configuration can be used regardless of whether a
hardware FPU is available or supports half-precision operations.
When an FP16-capable FPU is not available, the compiler will
automatically provide the software emulations.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the ARMv8.1-M M-Profile Vector Extension (MVE)
configurations as well as the compiler flags to enable it.
The M-Profile Vector Extension consists of the MVE-I and MVE-F
instruction sets which are integer and floating-point vector
instruction sets, respectively.
The MVE-I instruction set is a superset of the ARM DSP instruction
set (ARMv7E-M) and therefore depends on ARMV8_M_DSP, and the MVE-F
instruction set is a superset of the ARM MVE-I instruction set and
therefore depends on ARMV8_1_M_MVEI.
The SoCs that implement the MVE instruction set should select the
following configurations:
select ARMV8_M_DSP
select ARMV8_1_M_MVEI
select ARMV8_1_M_MVEF (if floating-point MVE is supported)
The GCC compiler flags for the MVE instruction set are specified
through the `-mcpu` flag.
In case of the Cortex-M55 (the only supported processor type for
ARMv8.1-M at the time of writing), the `-mcpu=cortex-m55` flag, by
default, enables all the supported extensions which are DSP, MVE-I and
MVE-F.
The extensions that are not supported can be specified by appending
`+no(ext)` to the `-mcpu=cortex-m55` flag:
-mcpu=cortex-m55 Cortex-M55 with DSP + MVE-I + MVE-F
-mcpu=cortex-m55+nomve.fp Cortex-M55 with DSP + MVE-I
-mcpu=cortex-m55+nomve Cortex-M55 with DSP
-mcpu=cortex-m55+nodsp Cortex-M55 without any extensions
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The compiler option "-fdiagnostics-color=always" is not known to XCC
(which is based on really old GCC). So don't enable color
diagnostic output when building with XCC.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
With respect to the mapping between the CPU variant
and the FPU we add an entry for Cortex-M v8-M CPU
variants without DSP. This should cover the case
of a Mainline Cortex-M which implements the Floating
Point extension but not the DSP extension.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit removes the `NOT no_libgcc` condition for the automatic
libgcc path detection.
The `no_libgcc` variable was previously set in this file to exclude
libgcc detection for the x86-64 targets because the x86-64 arch used
x32 ABI (`-mx32`) and the multilib for this ABI was not commonly
available. This is no longer the case (x86-64 targets now use `-m64`)
and libgcc must always be available.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
GCC 11 defaults to output DWARF version 5 which pyelftools cannot
currently parse. So keep output at version 4 for the time being.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds no-threadsafe-statics to compiler flags for gcc and arcmwdt.
The flag is required to compile the samples - the module can compile
without it.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
When compiler results are piped through a non-terminal (e.g. ninja)
the compiler disables colour diagnostics. Using `-fdiagnostics-color`
forces the compiler to enable colour output. This flag is set for
clang and gcc when `ZEPHYR_BUILD_COLOUR_DIAGNOSTIC` environment
variable is set when a clean build is started.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Use -march=armv8.4-a to compile zephyr on cortex-R82.
Because Cortex-R82 has not been enabled in GCC 10.x currently.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Split ARM and ARM64 architectures.
Details:
- CONFIG_ARM64 is decoupled from CONFIG_ARM (not a subset anymore)
- Arch and include AArch64 files are in a dedicated directory
(arch/arm64 and include/arch/arm64)
- AArch64 boards and SoC are moved to soc/arm64 and boards/arm64
- AArch64-specific DTS files are moved to dts/arm64
- The A72 support for the bcm_vk/viper board is moved in the
boards/bcm_vk/viper directory
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
'-Wexpansion-to-defined'
Warn whenever 'defined' is encountered in the expansion of a macro
(including the case where the macro is expanded by an '#if'
directive). Such usage is not portable. This warning is also
enabled by '-Wpedantic' and '-Wextra'.
This is enabled by default in llvm but not in gcc. Given that it is 'not
portable', lets disallow this in gcc and keep both compilers in sync.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds the correct compiler and linker flags to
support software floating point operations. The flags
need to be added to TOOLCHAIN_*_FLAGS for GCC to find
the correct library (when calling GCC with
--print-libgcc-file-name).
Note that software floating point needs to be turned
on for Newlib. This is due to Newlib having floating
point numbers in its various printf() functions which
results in floating point instructions being emitted
from toolchain. These instructions are placed very
early in the functions which results in them being
executed even though the format string contains
no floating point conversions. Without using CONFIG_FPU
to enable hardware floating point support, any calls to
printf() like functions will result in exceptions
complaining FPU is not available. Although forcing
CONFIG_FPU=y with newlib is an option, and because
the OS doesn't know which threads would call these
printf() functions, Zephyr has to assume all threads
are using FPU and thus incurring performance penalty as
every context switching now needs to save FPU registers.
A compromise here is to use soft float instead. Newlib
with soft float enabled does not have floating point
instructions and yet can still support its printf()
like functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
We compile objects with -mcmodel=medany. Now also give -mcmodel=medany
to the GCC front-end when linking to pick up the corresponding
multilibs.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
Compound assigments like x |= y to volatile qualified values are
deprecated in C++20. This idiom is common in CMSIS headers for
manipulating peripheral registers. Since these headers are core they
are likely to be included indirectly in C++ modules; since they are in
vendor-provided headers we can't "fix" them.
Disable the warning when building for C++.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This change adds full shared floating point support for the SPARC
architecture.
All SPARC floating point registers are scratch registers with respect
to function call boundaries. That means we only have to save floating
point registers when switching threads in ISR. The registers are
stored to the corresponding thread stack.
FPU is disabled when calling ISR. Any attempt to use FPU in ISR
will generate the fp_disabled trap which causes Zephyr fatal error.
- This commit adds no new thread state.
- All FPU contest save/restore is synchronous and lazy FPU context
switch is not implemented.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This commit defines the tool prefix and command line options for the
Zephyr SPARC architectural port.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
XCC does not support the compiler flag -Wno-unused-but-set-variable
so check for flag support before setting it in cmake.
Fixes#29707
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fixes#28456
This commit extends `target_ld_options()` with a NO_SPLIT flag.
Specifying `NO_SPLIT` will ensure that all linker flags will be applied
together when testing the compiler and linker.
This allows a caller to ensure that flags are tested together.
This fixes the RISC-V case where the flags `-mabi` and `-march` were
omitted because they were tested individually.
Note, the update of `target_ld_options()` will allow the same flag on
`zephyr_ld_options()`
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #28097
The compiler warning flag `-Werror=implicit-int` was added using
`set_compiler_property()` which will always add the compiler flag if the
compiler flag supports it.
This has been changed to `check_set_compiler_property()` which will
check if the flag is among the list of `CXX_EXCLUDED_OPTIONS`, and only
adds the flag if both the compiler supports it, and it is not an
excluded option.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Compile with arm-none-eabi-g++ (10.2.0 with -std=c++17) generates a
warning for every C++ source file:
"cc1plus: warning: command-line option '-Wno-pointer-sign' is valid for
C/ObjC but not for C++"
Get rid of those warnings by adding '-Wno-pointer-sign' to the list of
excluded CXX options.
Signed-off-by: Rihards Skuja <rihardssk@mikrotik.com>
Generate errors for implicit conversions that may alter a value, that
covers conversions implicit conversions to narrower types, different
signal, different essential types (float -> int), ... From GCC
documentation
(https://gcc.gnu.org/onlinedocs/gcc-9.3.0/gcc/Warning-Options.html)
"""
Warn for implicit conversions that may alter a value. This includes
conversions between real and integer, like abs (x) when x is double;
conversions between signed and unsigned, like unsigned ui = -1; and
conversions to smaller types, like sqrtf (M_PI). Do not warn for
explicit casts like abs ((int) x) and ui = (unsigned) -1, or if the
value is not changed by the conversion like in abs (2.0). Warnings
about conversions between signed and unsigned integers can be disabled
by using -Wno-sign-conversion.
For C++, also warn for confusing overload resolution for user-defined
conversions; and conversions that never use a type conversion
operator: conversions to void, the same type, a base class or a
reference to them. Warnings about conversions between signed and
unsigned integers are disabled by default in C++ unless
-Wsign-conversion is explicitly enabled.
"""
This partially cover rules: 10.4, 10.5, 10.6, 10.7 and 10.8
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add implicit-fallthrough flag when CONFIG_MISRA_SANE is set.
It will require __fallthrough macro or a proper comment tells the
compiler that this happens intentionally.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add a Kconfig option to enable compiler flags that help to enforce
some code guideline rules.
Note: As the current code base is not in compliance with the adopted
code guideline, some rules will generate warnings during the
build. This is intended to help to spot violations.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This reverts commit 680f401ef2.
3rd party code in modules is failing due to this enforcment. We need a
away to exclude module code to support such options.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Option -Wimplicit-fallthrough as the name suggests raises a warning when
there is an implicit fallthrough in a switch clause. This warning does
not happen when the last statement is a return or a call to a function
declared with noreturn attribute.
This flag helps to enforce two MISRA-C rules (not completely), 16.1 and
16.3
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
