Now that SPI drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the SPI.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.
Signed-off-by: Kumar Gala <galak@kernel.org>
Now that serial drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the serial.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.
Signed-off-by: Kumar Gala <galak@kernel.org>
Now that gpio drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Typically the Kconfig.defconfig* will blindly enable a
sensor and not respect the devicetree state of the GPIO.
Additionally we can get problems with prj.conf/defconfig
getting incorrectly overridden.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add alias to boards with spi-flash to facilitate the
update of samples/drivers/spi_flash.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
In order to bring consistency in-tree, migrate all boards code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Kconfig options now belong to the Kconfig domain, therefore, the
:kconfig:option: role needs to be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce a new "zephyr,memory-region" compatible to be used when a new
memory region must be created in the linker script from the devicetree
nodes using the compatible.
Remove also the LINKER_DT_REGION_FROM_NODE macro and add a new
LINKER_DT_REGIONS macro to cycle through all the compatible regions.
In the same PR modify the DTS files and the linker scripts.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Fix the compilation of board.c when the DAPlink QSPI MUX devicetree
node is enabled.
Fixes: 3632815e2e
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
There is a GPIO driver for use with arty so enable the GPIO feature in
the board yaml to get some testing of it.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
At this time there's no clear need to support anything other than the
A35T variant, but to simplify future extension show where the
partition size came from and document the corresponding parameter for
the A100T variant.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Add missing default for enabling CONFIG_SPI if CONFIG_FLASH is
enabled. This is needed for CONFIG_SPI_NOR.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The ARM Cortex-M1/M3 DesignStart FPGA reference designs support booting
from an off-board, memory-mapped QSPI NOR flash device. The V2C DAPlink
shield from ARM Ltd. provides support for this feature.
If the board/shield is not configured for booting from the QSPI NOR
device, that same device is available as a regular QSPI NOR flash
device.
The presense of a shield configured for QSPI NOR flash boot is indicated
through an IRQ line used as a level-detect, non-interrupt signal.
Introduce a board specific devicetree binding for the DAPLink QSPI MUX
and provide a board specific API accessing it. Automatically set the
QSPI MUX to to provide regular QSPI NOR flash access if the board/shield
is not configured for memory-mapped QSPI NOR flash boot.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The ARM Cortex-M1/M3 DesignStart FPGA reference designs both use IRQ 7
(the last IRQ line) as a level-detect non-interrupt signal to determine
whether the V2C-DAPLINK shield is installed. Thus IRQ 7 cannot be used
as a regular IRQ line.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add board definition for the ARM Cortex-M3 DesignStart FPGA reference
design running on the Digilent Arty development board.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Refactor the ARM Cortex-M1 DesignStart FPGA/Digilent Arty A7 board
definition to prepare for Cortex-M3 support.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add the Xilinx AXI Quad SPI IP instances present in the ARM Cortex-M1
DesignStart FPGA reference design and enable the instance connected to
the onboard SPI NOR flash containing the FPGA configuration bitstream.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add board definition for the ARM DesignStart FPGA Cortex-M1 reference
design on the Digilent Arty FPGA development board.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
