Added an overlay file for the LPC55S36 to demonstrate
the DMA Support with the scatter_gather test.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Added an overlay file for the LPC55S36 to demonstrate
the DMA Support with the loop_transfer test.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Added an overlay file for the LPC55S36 to demonstrate
the DMA Support with the chan_blen_transfer test.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Show an example of the LPC DMA Kconfig to reduce RAM based on the number
of DMA channels expected to be used. In this test, only one DMA channel
is needed, so we can show an example of how to reduce RAM usage of the
driver by configuring this value appropriately.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Each SoC may have different limitation regarding DMA buffer size.
This commit places the test transfer size in Kconfig so it can
be modified accordingly.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
The nucleo c031c6 was filtered due to small ram size. However, the
application did fit when builed and run with west. We add a low footprint
variant of the test to also test on platforms with smaller size but where
the application fits.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
The scatter gather test now does a transfer list of 4 and the LLI pool
config needs to be updated to match the new test requirement.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
When attempting to add a new platform and run the suite with
`twister`, it seemed to be resulting in being statically
filtered-out. Likely, the correct filter is `test_dma0`,
assuming that `test_dma*` nodes should be enumerated starting
at 0.
Verified the fix by adding `dma` as `supported` to
`boards/arm64/bcm958402m2_a72/bcm958402m2_a72.yaml` and by
adding the `test_dma0` node to
`chan_blen_transfer/boards/bcm958402m2_a72.overlay`.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
The test does not appear to support 64-bit DMA
* mitigate compiler warning
* support 64-bit addressing mode with `CONFIG_DMA_64BIT`
Signed-off-by: Chris Friedt <cfriedt@meta.com>
This patch modifies the existing loop transfer test to allow testing for
device power state changes when starting and stopping a transfer.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Configure the tests/drivers/dma/loop_transfer
and the tests/drivers/dma//chan_blen_transfer
to run on the stm32h573i_dk : use gpdma1 or gpdma2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change this test to use the automatically generated linker section
to place the buffer in SRAM4, instead of using the manually created
region added in 088d38f. This is in preperation of removing the
manually created section.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add unit tests for BDMA driver.
Also requires adding additional kconfig options to allocate
the memory buffers in a specific SRAM section, because
the BDMA only has access to SRAM4.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add DMA unit tests for BDMA driver.
Also requires adding additional kconfig options to allocate
the memory buffers in a specific SRAM section, because
the BDMA only has access to SRAM4.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Ensures that the documented behavior of the API is met by implementations
through testing. By calling stop on a stopped channel the expectation is no
error occurs and is checked.
Calling start after a channel has been started is difficult to test for
as there is transfer timing involved. A once shot transfer may have
completed and the channel transition to an inactive state by itself by
the time the second start call is performed. This isn't supported by at
least gpdma today and isn't documented behaviorally so should not be
tested.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
integration_platforms help us control what get built/executed in CI and
for each PR submitted. They do not filter out platforms, instead they
just minimize the amount of builds/testing for a particular
tests/sample.
Tests still run on all supported platforms when not in integration mode.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add the testcase to run on the stm32u5x5 disco kit
and nucleo_u575zi_q boards.
The DMA instance is the GPDMA (up to 16 channels).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
in NXP platform, src address shall be 4 bytes alligned
adding this restricting to test cases
fixing: #48512
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
