- add nucleo_c071rb overlay file to setup spi and dma nodes
- Add the nucleo_c071rb configuration file to reduce the size of
SPI_LARGE_BUFFER_SIZE to avoid RAM overflow and be able
to run the test.
- update testcase.yaml for CI integration
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Plus refactored the structure of the overlay files.
The wiring of the new test is the same as the existing spi tests
for rpi-pico.
The speed of the fast test has to be reduced to ensure signal integrity.
Setting CONFIG_SPI_ASYNC will trigger a hard fault. Seems to be a bug in
the driver.
Signed-off-by: Terry Geng <terry@terriex.com>
Currently, the SPI pinctrl is incorrect for the spi0 node.
In this PR (#77850), we changed the pinctrl number for SPI
from spi0 to spi1, but we forgot to update the node name
to spi1.
This commit aims to:
- Correct the spi node in test app spi_loopback for ek_ra8d1
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add pinctrl and dma channel/mux information for lpspi3 on cm33/cm7 cores.
Set dma4 status is OK.
Add pinctrl for lpuart3
tests: driver: spi: support spi_loopback case on MIMXRT1180_EVK
Add .config/.overlay files for cm33/cm7 cores
Link to ocram1 as RAM region on cm7 core
Link to dtcm as RAM region on cm33 core
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Avoid referring to Pico 2 (the name of a board). In this context,
RPI_PICO is used to refer to the (Zephyr) `SOC_FAMILY` rather than the
Pico 1 board. This clarifies common numerical values between the RP2040
and RP2350 SoC series, and enables existing DTS files to be used with
RP2350-based boards with fewer changes.
Remove the use of Zehpyr's `CONFIG_` macros from the device tree files,
and replace them with `SOC_SERIES`-specific files. Update the driver
implementation to conditionally include the correct file. Update
documentation and samples to match.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Convert qspi and hyperflash to variants instead of revisions by popular
demand.
And convert evkb into a revision instead of a different board.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fixes overlay configuration to allow running the test on CI without
externally connecting two pins.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
In order to allow fiting test in targets with smaller memory make
large buffer configurable through Kconfig.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add overlay for APARD32690 board and add a new test case to
test RTIO functionalities of SPI MAX32 driver.
Signed-off-by: Dimitrije Lilic <dimitrije.lilic@orioninc.com>
Use EXTRA_CONF_FILE in sample yaml files,
that replaced deprecated OVERLAY_CONFIG
since the Zephyr v3.4 release.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
This region is only required if certain fast peripherals make use of such
region for DMAing. It was now enabled on all builds, often resulting in:
```
[134/134] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 24372 B 248 KB 9.60%
RAM: 4448 B 256 KB 1.70%
DMA_RAM21: 0 GB 16 KB 0.00% <~~ Not used!
DMA_RAM3x_APP: 40 B 4 KB 0.98%
IDT_LIST: 0 GB 32 KB 0.00%
```
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Align all existing samples/tests/applications which
contains nrf54l15pdk/nrf54l15/* by adding
nrf54l15dk/nrf54l15/* to enable twister builds.
Signed-off-by: Katarzyna Giądła <katarzyna.giadla@nordicsemi.no>
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
1. kenistis dspi does support rx and tx with different size,
so skip the tx_bigger test.
2. dspi dma need internal alignment and 8192 bytes are too
many for k64, so reduce to 1440 bytes
fixing: #77010
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Define DMA channels for MAX32 boards and add a new test case so that
DMA-based SPI transfers are tested.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Connect D12(PA6) & D22(PB5) pins on the board to pass the test.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
Reviewed-by: Vasilij Strassheim <vasilij.strassheim@linutronix.de>
The board is capable to serve SPI on the Arduino extention header.
Configure and enable SPI to work on the extention.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
The nucleo_h7X3zi overlays use memory attributes and therfore the
dedicated include file. This is unnessesary, since the memory attribute
include is already included from the underlaying CPU base file
"stm32h7.dtsi". Remove the unnessesary includes.
Signed-off-by: Benedikt Spranger <b.spranger@linutronix.de>
pwm: pwm_api: update testcase.yaml and add new overlay configuration
to support flexio pwm driver.
spi: spi_loopback: update testcase.yaml and add new overlay
configuration to support flexio spi driver.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
SPI pins are defined in board.dts file to simplify usage
so that no need to redefine it in overlay files
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
Enable SPI test for MAX32662EVKIT.
SRAM size increased to get enough space for SPI test image
Co-Authored-By: Sadik Ozer <sadik.ozer@analog.com>
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
