Add power domains for EDMA0's channels 6, 7, 14, and 15.
For QM these are identified as IMX_SC_R_DMA_2_*, while
for QXP thy are identified as IMX_SC_R_DMA_0_*.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This has no address space and doesn't belong between peripheral
nodes. Move it up the DTSI for better visibility. No functional
change.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
imx8qm and imx8qxp have a couple of differences regarding
the peripheral address spaces and how the DT nodes are
configured, which is why using a generic DTSI (nxp_imx8.dtsi)
for the both of them is not right.
One of the differences between the two, which affects Zephyr
is the fact that irqstr's address space is different. Up until
now this has been dealt with at the board level (i.e:
imx8qxp_mek_mimx8qx6_adsp.dts), which is not right as this is not
board-specific, but rather soc-specific. Additionally, this
causes the following warning during compilation:
"unit address and first address in 'reg' (0x51080000) don't
match for /interrupt-controller@510a0000"
To fix this, add two new DTSIs: nxp_imx8qm and nxp_imx8qxp.
Each board (i.e: imx8qm_mek and imx8qxp_mek) will have to include
the DTSI for their soc instead of the generic DTSI (i.e: nxp_imx8).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Set AMP dts nodes (ipm, mbox, ...) to use fixed locations in reserved
memory areas. Those areas memories are delimited in the `memory.h`.
Size of the occupied areas can be calculated but the dts nodes addresses
needs to be set manually in every case.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
This patch refactors the power management initialization for the SSP
driver across ACE15, ACE20, and ACE30 generations to align with the
recommended practices outlined in the documentation. The changes
include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the `ssp_init` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the SSP nodes
in the device tree files for ACE15, ACE20, and ACE30.
3. Moving the power domain assignment for the SSP device in the device
tree. The previous configuration resulted in the device not being under
any power domain and being initialized as always ON.
These changes ensure that the SSP driver is initialized with the
appropriate power management state and that runtime power management is
automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch refactors the power management initialization for the DMIC
driver across ACE15, ACE20, and ACE30 generations to align with the
recommended practices outlined in the documentation. The changes
include:
1. Replacing the conditional initialization of power management state
with a call to `pm_device_driver_init` in the
`dai_dmic_initialize_device` function.
2. Adding the `zephyr,pm-device-runtime-auto` property to the DMIC nodes
in the device tree files for ACE15, ACE20, and ACE30.
These changes ensure that the DMIC driver is initialized with the
appropriate power management state and that runtime power management is
automatically enabled based on the device tree configuration. The
functionality of the power management state remains unchanged, ensuring
consistent behavior.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch addresses several issues with the Intel ADSP HDA DMA driver:
1. Refactors the HDA DMA power management initialization. The previous
use of `pm_device_runtime_enable` was incorrect. The updated approach
relies on enabling runtime power management through the device tree
using the `zephyr,pm-device-runtime-auto` property. Additionally, the
patch removes redundant device initialization steps as these are already
handled by `pm_device_driver_init` when the device is under a power
domain.
2. Corrects the power domain assignment for the HDA link. The HDA link
was previously assigned to the io0 power domain based on a
misinterpretation of the documentation. The correct power domain
assignment is now based on updated documentation for LNL, ensuring that
the HDA link is associated with the appropriate power domain.
These changes ensure that the HDA DMA driver properly manages power
states, reducing power consumption and improving system stability, while
ensuring the correct power domains are used.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch addresses the following issues with the Intel HDA DAI driver:
1. Adds power management support for the HDA DAI driver by implementing
the `hda_pm_action` function and integrating it with the Zephyr power
management framework.
2. Ensures balanced calls to `pm_device_runtime_get` and
`pm_device_runtime_put` by modifying the `probe` and `remove`
functions to use these power management calls.
3. Ensures that the io0 power domain is active when the HD Audio is in
use by assigning the correct power domain to the HDA DAI devices in
the device tree files for various Intel ADSP platforms (ace15_mtpm,
ace20_lnl, ace30, ace30_ptl).
4. Enables runtime power management for the HDA DAI devices by adding
the `zephyr,pm-device-runtime-auto` property in the device tree.
These changes ensure that the HDA DAI driver properly manages power
states, reducing power consumption and improving system stability, while
ensuring the io0 power domain is active when required.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Rename "nxp,kinetis-lpuart" compatible to "nxp,lpuart" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
* Replace copies of fixed-partitions nodes in related boards by
referencing the apropriate partition table from the available list.
* For better reference the `partitions_*.dtsi` file has boot offset,
purpose and the flash size encoded in the file name. Default flash size
is considered to be 4MB.
* Added the flash size node for the boards which are not based on the
module.
* Removed flash size registry from the esp32.*common.dtsi
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Add a common part for AMD board ACP_6_0_ADSP.
Add support for ACP_6_0_ADSP BOARD,
which represents ACP_6_0 soc.
This has a 1 Xtensa HiFi5 core, with 200-800MHz
1.75 MB HP SRAM / 512 KB IRAM/DRAM,
1 x SP (I2S, PCM), 1 x BT (I2S, PCM), 1 x HS(I2S, PCM), DMIC as
audio interfaces.
Signed-off-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
This commit introduces the L2 Memory Capabilities (hsbcap) register node
to the Devicetree specifications for Intel ADSP ACE platforms. The
hsbcap register provides information on the general capabilities
associated with the L2 memory, which is critical for system
configuration and resource management. The hsbcap node has been added to
the Devicetree source files for ACE 1.5 (MTPM), ACE 2.0 (LNL), and ACE
3.0 (PTL) platforms.
In addition, the DFL2MM_REG macro in adsp_memory.h has been updated to
use the Devicetree node label for hsbcap, ensuring a consistent and
maintainable approach to accessing this register across the codebase.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Align the shared memories with the memory.h layout.
Reorder nodes to show memory related nodes together.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Some devices may belong to >1 power domain, so with the current design
this is something not possible to describe. It's worth to note that
Linux also uses the `power-domains` naming scheme, not `power-domain`.
This patch also introduces `power-domain-names` so that each entry in
`power-domains` can be given a name if needed. `#power-domain-cells`
is now required as well.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Enable the irqstr interrupt controller for the adsp-based
imx8mp.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Tested-by: Daniel Baluta <daniel.baluta@nxp.com>
Add mailbox node used for inter-process communication.
For DSP, we have a direct interrupt line to the core.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Renamed soc from ace30_ptl to ace30.
We were previously using the wrong soc name.
The correct name is ace30.
There is only one ptl platform, but there can be several ace30 platforms.
Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
The 'soft-off' state must be used when explicitly request by calling
`pm_state_force`. Set this state as disabled in dts ensures that the
pm policy manager will not use this state.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
I2S driver was merged after interrupt .dtsi was changed,
causing CI to fail. This updates it accordingly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Programming of the MLCS register was performed on the incorrect bits.
Additionally, saving the new version did not erase the previously set
value, which could result in an incorrect register value.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
This patch removes definitions of power domains from the ACE30 PTL DTS
file that do not exist in the actual hardware.
The following power domain nodes have been removed:
- 'ml1_domain' with a bit-position of <13>
- 'io3_domain' with a bit-position of <11>
- 'io2_domain' with a bit-position of <10>
These nodes were previously included in the DTS file but do not
correspond to any physical power domain in the ACE30 PTL hardware. Their
presence in the DTS could lead to confusion and misconfiguration, as the
software might attempt to interact with non-existent hardware features.
By removing these nodes, the DTS now accurately reflects the hardware
capabilities of the ACE30 PTL platform, ensuring that the power
management infrastructure within the firmware operates based on the
correct hardware configuration.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Remove the Audio Link Hub (ALH) nodes from the ACE 3.0 PTL DTS file.
This patch cleans up the Device Tree Source (DTS) for the ACE 3.0 PTL
platform by removing the definitions of the ALH DAI nodes. The ALH
interface is not utilized in the ACE 3.0 PTL architecture, making these
nodes redundant.
The following changes are made:
- Deleted the 'alh0' and 'alh1' nodes, which were previously defined
with FIXME comments indicating a problematic modeling of individual
ALH channels/instances using node labels.
This cleanup helps to prevent confusion and potential errors in device
configuration by ensuring that the DTS reflects the actual hardware
capabilities of the ACE 3.0 PTL platform.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Rearrange the power domain entries in the ACE30 PTL device tree source
file to be in ascending order according to their bit positions. This
reordering improves the readability of the device tree source by
grouping power domains logically according to their bit position within
the power management registers.
The changes in this patch include:
- Moving 'ml1_domain' and 'ml0_domain' to their correct positions
according to their bit-position values (13 and 12, respectively).
- Adjusting the order of 'io3_domain', 'io2_domain', 'io1_domain', and
'io0_domain' to reflect their bit positions (11, 10, 9, and 8).
- Placing 'hub_hp_domain' and 'hst_domain' at their new positions
according to their bit-position values (6 and 5).
No functional changes are introduced with this patch. It solely aims to
make the device tree source more intuitive and easier to navigate when
mapping power domains to their respective control bits.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This commit refactors the SSP driver to support the Intel ACE30 PTL
platform. The changes include:
- Adding new structures ssp_rx_dir and ssp_tx_dir to hold the TDM
slot configuration for RX and TX directions
- Adjusting the dai_ssp_set_config_blob functions to work with
the new TDM slot configuration.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
adsp_memory.h is pretty much the same for all ace platforms.
Generalize it getting register address from devicetree and
and move it to a common place.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the
management of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
- ace30 (PTL) support.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This commit adds definition of ACE 3.0 Panther Lake board.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This WDT is responsible for monitoring the external
32.728 Hz crystal connected to pins XTAL_32K_P and
XTAL_32K_N. If an oscillation failure is detected
the hardware automatically switch to RTC_RC_SLOW
clock source and triggers an interrupt.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
