drivers: adc: esp32: Clock init
Peripheral clock init. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
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@ -30,6 +30,7 @@
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#include <zephyr/device.h>
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#include <zephyr/drivers/adc.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(adc_esp32, CONFIG_ADC_LOG_LEVEL);
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@ -45,6 +46,8 @@ LOG_MODULE_REGISTER(adc_esp32, CONFIG_ADC_LOG_LEVEL);
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#define ADC_DMA_BUFFER_SIZE DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED
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struct adc_esp32_conf {
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const struct device *clock_dev;
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const clock_control_subsys_t clock_subsys;
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adc_unit_t unit;
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uint8_t channel_count;
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#if defined(CONFIG_ADC_ESP32_DMA)
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@ -588,7 +591,15 @@ static int adc_esp32_init(const struct device *dev)
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{
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struct adc_esp32_data *data = (struct adc_esp32_data *) dev->data;
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const struct adc_esp32_conf *conf = (struct adc_esp32_conf *) dev->config;
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uint32_t clock_src_hz = 0;
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uint32_t clock_src_hz;
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#if SOC_ADC_DIG_CTRL_SUPPORTED && !SOC_ADC_RTC_CTRL_SUPPORTED
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if (!device_is_ready(conf->clock_dev)) {
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return -ENODEV;
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}
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clock_control_on(conf->clock_dev, conf->clock_subsys);
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#endif
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esp_clk_tree_src_get_freq_hz(ADC_DIGI_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clock_src_hz);
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@ -601,6 +612,8 @@ static int adc_esp32_init(const struct device *dev)
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adc_oneshot_hal_init(&data->hal, &config);
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sar_periph_ctrl_adc_oneshot_power_acquire();
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#if defined(CONFIG_ADC_ESP32_DMA)
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if (!device_is_ready(conf->gpio_port)) {
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LOG_ERR("gpio0 port not ready");
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@ -673,6 +686,9 @@ static DEVICE_API(adc, api_esp32_driver_api) = {
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#define ESP32_ADC_INIT(inst) \
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\
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static const struct adc_esp32_conf adc_esp32_conf_##inst = { \
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.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(inst, offset), \
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.unit = DT_PROP(DT_DRV_INST(inst), unit) - 1, \
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.channel_count = DT_PROP(DT_DRV_INST(inst), channel_count), \
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ADC_ESP32_CONF_GPIO_PORT_INIT \
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@ -304,6 +304,7 @@
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adc0: adc@60040000 {
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compatible = "espressif,esp32-adc";
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reg = <0x60040000 4>;
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clocks = <&rtc ESP32_SARADC_MODULE>;
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unit = <1>;
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channel-count = <5>;
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#io-channel-cells = <1>;
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@ -313,6 +314,7 @@
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adc1: adc@60040004 {
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compatible = "espressif,esp32-adc";
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reg = <0x60040004 4>;
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clocks = <&rtc ESP32_SARADC_MODULE>;
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unit = <2>;
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channel-count = <2>;
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#io-channel-cells = <1>;
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@ -456,6 +456,7 @@
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adc0: adc@3ff48800 {
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compatible = "espressif,esp32-adc";
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reg = <0x3ff48800 10>;
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clocks = <&rtc ESP32_SARADC_MODULE>;
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unit = <1>;
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channel-count = <8>;
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#io-channel-cells = <1>;
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@ -465,6 +466,7 @@
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adc1: adc@3ff48890 {
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compatible = "espressif,esp32-adc";
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reg = <0x3ff48890 10>;
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clocks = <&rtc ESP32_SARADC_MODULE>;
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unit = <2>;
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channel-count = <10>;
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#io-channel-cells = <1>;
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@ -350,6 +350,7 @@
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adc0: adc@3f440018 {
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compatible = "espressif,esp32-adc";
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reg = <0x3f440018 100>;
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clocks = <&rtc ESP32_PERIPH_SARADC_MODULE>;
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unit = <1>;
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channel-count = <10>;
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#io-channel-cells = <1>;
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@ -359,6 +360,7 @@
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adc1: adc@3f440028 {
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compatible = "espressif,esp32-adc";
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reg = <0x3f440028 100>;
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clocks = <&rtc ESP32_PERIPH_SARADC_MODULE>;
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unit = <2>;
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channel-count = <10>;
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#io-channel-cells = <1>;
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@ -353,6 +353,7 @@
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adc0: adc@60040000 {
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compatible = "espressif,esp32-adc";
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reg = <0x60040000 4>;
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clocks = <&rtc ESP32_SARADC_MODULE>;
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unit = <1>;
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channel-count = <10>;
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#io-channel-cells = <1>;
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@ -362,6 +363,7 @@
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adc1: adc@60040004 {
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compatible = "espressif,esp32-adc";
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reg = <0x60040004 4>;
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clocks = <&rtc ESP32_SARADC_MODULE>;
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unit = <2>;
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channel-count = <10>;
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#io-channel-cells = <1>;
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