The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
NXP FlexTimer Module is a configurable timer peripheral hence it should
be located under bindings/timer.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Creation of the new zephyr\soc\nxp\common\nxp_nbu.c driver which manage
the interruption of the NBU. This modification is mandatory to support a
coex application which includes Bluetooth and 802.15.4 on the same
narrow band path.
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
Introduce etrbuffer in the tddconf bindings to support flexible
placement in the memory map.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Extended UICR will not be used as its configurations will be merged
with the UICR registers in NVR.
Memory maps changes are needed to align with pre compiled
firmware.
Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
For nrf54h20 a range of combinations exist to configure the test and
debug domains data sources and sinks. Expose them in DTS to allow
configuring them. Also drop the previous style which was too rigid to
extend to cover all cases cleanly. The old style was only used in a
single sample application so far.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Convert the hci_nxp.c HCI driver to use the new HCI driver API. Also move
the driver binding under dts/bindings/bluetooth, like all other HCI driver
bindings.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
Add devicetree nodes for the Reset Information registers on nRF54H20,
along with a new binding.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Include reset device binding in some of the NXP LPC
IP bindings to be able to add the resets property.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
And add the corresponding bindings.
Move alse the already existing bindings for nrf-dppic, nrf-ppi,
and nrf-ipc so they are located together with the new ones and
in more appropriate folders (DPPIC and PPI peripherals are not
related to ARM, and IPC is for sending and receiving events,
not messages, so ipm/ does not seem to be the best fit for it).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add a set of bindings that will be used in the nRF54H20 SoC definition.
Extend the existing GPIOTE binding with properties needed for this SoC.
Also do a tiny clean-up in the bindings added recently for nRF54L15
(HFXO and LFXO).
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Utilize a code spell-checking tool to scan for and correct spelling errors
in all files within the dts/bindings/adc and arm.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Remove nxp,imx-mu-rev2 compatible. This IP block is the same as the
nxp,imx-mu device, and should be handled by the same compatible
Instead, use CONFIG_HAS_MCUX to determine which HAL APIs should be used
to interact with the messaging unit IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add three xbar nodes and four qdec nodes in the rt10xx devicetree include.
Add xbara to rt1052 in Kconfig.soc
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Updating mps3_an547 board files with DTB entries for Ethos-U.
Adding DTS bindings for the Ethos-U DTB entry.
Signed-off-by: Kristofer Jonsson <kristofer.jonsson@arm.com>
Signed-off-by: Fredrik Knutsson <fredrik.knutsson@arm.com>
All in tree device drivers use some form of DEVICE_DT_GET
so we no longer need to require label properties.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add simple clock control node in devicetree for beetle to handle
relationship between drivers (uart, timers, gpio) and clock controller
device.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add missing devicetree nodes representing the following peripherals
in nRF SoCs:
- ACL
- BPROT
- CCM
- COMP/LPCOMP
- CTRLAP
- DCNF
- MPU (nRF MPU peripheral in nRF51 Series, not ARM MPU)
- MUTEX
- MWU
- NFCT
- OSCILLATORS
- POWER (in nRF51 and nRF52 Series)
- PPI
- RESET
- SWI
- USBREG
Add also corresponding bindings and validation of base addresses of
these nodes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This update Atmel sam ssc driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove DEV_NAME macro at sam xdma driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Introduce a new "zephyr,memory-region" compatible to be used when a new
memory region must be created in the linker script from the devicetree
nodes using the compatible.
Remove also the LINKER_DT_REGION_FROM_NODE macro and add a new
LINKER_DT_REGIONS macro to cycle through all the compatible regions.
In the same PR modify the DTS files and the linker scripts.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
YAML description file for the On-Chip Memory of the Xilinx
Zynq-7000, DT identifier "xlnx,zynq-ocm".
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Include the mem-region bindings for the stm32 ccm nodes and set the name
in the current dtsi files.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Introduce optional `zephyr,linker-region` property which signifies that
the node should result in a linker memory region and what the name of
that region should be. Property added to compatibles likely to result
in a linker memory region; 'mmio-sram', 'arm,itcm`, `arm,dtcm`,
`nxp,imx-itcm`, `nxp,imx-dtcm` and `fixed-partitions`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use a combination of fixed-clock and fixed-factor-clock devicetree
nodes for describing the clock dividers/multipliers of the NXP Kinetis
System Clock Generator (SCG) present in the KE1xF SoC series.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This device is not an ARM MCU, it's a radio front-end module. Based
on existing Linux practice it belongs in net/wireless.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Update nrf21540 DTS to support FEM configuration and update other pins
according to te board datasheet
Signed-off-by: Jakub Pegza <Jakub.Pegza@nordicsemi.no>
Change the documentation for the arm,dtcm (Data Tightly Coupled Memory)
to reflect that it is not specific to the Cortex-M7 (but also present
on e.g. the Cortex-M1).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Allow configuring the clock prescaler divider for the NXP Kinetis
FlexTimer. Setting the prescaler to a lower value allows for much
higher resolution/accuracy for the generated PWM waveforms.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert i2s_sam_ssc driver to utilize devicetree. We replace Kconfig
options for specifying the DMA configuration (channel, DMA device name)
with getting that from devicetree. We also get pincfg from devicetree,
however we still have Kconfig sybmols to specify if the RF or RK pin is
enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Do not assume in the SoC level device trees that NXP Kinetis FlexTimer
nodes will always be configured as PWM. Instead, configure FlexTimer
nodes for PWM at the board level for NXP Kinetis boards.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the atmel,sam0-dmac binding under the dma binding dir and add
cell information for channel and trigger source. Update the associated
dtsi files to match these changes.
This is in prep of ATMEL SAM0 SERCOMM devices like UART, I2C, and SPI to
user proper 'dmas' property to specify the dma info to use.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the GCLK, MCLK, and PM clock controllers. Add bindings
and devicetree nodes associated with these clock controllers. Also add
clock references for the SERCOM peripheral set to allow those drivers
(i2c, spi, uart) to utilize this information.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
