Commit Graph

9645 Commits

Author SHA1 Message Date
Reto Schneider
b11ba9ddc8 net: net_pkt: Simplify net_pkt_compact() API
Since db11fcd174 [net/net_pkt: Fully
separate struct net_pkt from struct net_buf], net_pkt_compact() can not
fail anymore.

This commit acknowledges this and simplifies the API accordingly.

Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
2022-09-15 16:35:11 +00:00
Andy Ross
eb5c4aaa57 toolchain/gcc: Don't use no_sanitize("address") with gcc
GCC doesn't actually need this treatment, only clang.  (GCC is smart
enough to use "const" as the needed clue to suppress instrumentation
it seems like).  And it turns out older gcc's emit a warning
(attribute ignored, which is... sort of weird to warn about?) in that
circumstance, which breaks builds.  Just turn it off rather than try
to find a way to suppress that one warning.

Signed-off-by: Andy Ross <andyross@google.com>
2022-09-15 16:23:11 +00:00
Lauren Murphy
85445474f2 boards, dts: fix filenames and dts refs for adsp clock
Changes filenames and DTS references from CAVS clock to
ADSP clock.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-09-14 07:23:08 -04:00
Lauren Murphy
1983a4c50c boards, dts: fix namespace for intel adsp cavs, ace
Fixes namespace for Intel ADSP CAVS and ACE boards.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-09-14 07:23:08 -04:00
Henrik Brix Andersen
180cdc105e drivers: can: add start and stop CAN controller API functions
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.

This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().

During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.

Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.

Fixes: #45304

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-13 16:06:50 +00:00
Andrei Emeltchenko
7c50ab1f03 i3c: doc: Make documentation readable
Use @code .. @endcode blocks to make docs readable.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-09-12 10:25:29 -05:00
Sagar Shah
dfd897096d net: lib: coap: method_from_code() API change to return errors.
method_from_code() signature has changed to return error and
the method. In case of an invalid code it returns -EINVAL and
causes coap_handle_request() to return -ENOTSUP.

Fixes: #49498

Signed-off-by: Sagar Shah <sagar.shah@legrand.us>
2022-09-12 10:53:34 +00:00
Pavel Vasilyev
33b9f3e361 Bluetooth: Mesh: Prevent CDB reusing address of deleted nodes
According to MshPRFv1.0.1, section 3.10.7, the Provisioner shall only
use reuse addresses of the deleted nodes after IV Index is updated.

This change prevents CDB reusing addresses of the deleted nodes until IV
Index is updated. Due to a high range of the unicast addresses, CDB only
stores the highest deleted address once a node is deleted. This creates
a limitation where allocating a node with the high primary unicast
address and then deleting it will make CDB skip big range of address
until next IV Index update.

Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
2022-09-12 10:52:50 +00:00
Ola Tangen Kulseng
1df3de4e98 net: lwm2m: API for multiple resource writing
Used the registry lock in the functions lwm2m_registry_lock() and
lwm2m_registry_unlock() to make the registry lockable through a public
API. If writing to multiple resources that are composite-observed,
locking will halt the main thread until every resource is written to,
ensuring that only one notify message will be sent. Updated
the documentation in lwm2m to include this addition.

Signed-off-by: Ola Tangen Kulseng <ola.kulseng@nordicsemi.no>
2022-09-12 10:52:18 +00:00
Daniel Leung
3e8f97009d i3c: add I3C controller driver for MCUX
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.

Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Daniel Leung
66a9a15104 i3c: add a global workqueue for IBI
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Daniel Leung
1493285912 i3c: add API for controller to act as target device
This adds the bits to allow an I3C controller to act as target
device. This is modelled after the I2C target model.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Daniel Leung
ce7058d2f5 drivers: i3c: introduce I3C API for controllers
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2022-09-09 17:42:33 -04:00
Andriy Gelman
5feae0eafc drivers: pinctrl: Add pinctrl driver for xmc4xxx
Add pinctrl driver for infineon xmc4xxx devices.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-09-09 16:28:41 -04:00
Pierre-Emmanuel Novac
0e510cc2a6 drivers/clock_control: stm32: Configure and enable PLL2
DT node "st,stm32f105-pll2-clock" already exists but was not actually used
and PLL2 was not being configured.
PLL2 is available on STM32F105/F107 and should be turned off after turning
off PLL and turned on before turning on PLL again since PLL2 can be
used as a source for PLL. Source for PLL2 is always HSE.

Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
2022-09-09 16:28:15 -04:00
Jamie McCrae
c56b45c3e8 mgmt: mcumgr: Fix output packet to frame issue on serial transport
Fixes an issue with outgoing mcumgr frames that are larger than the
transport MTU size whereby they would wrongly be split up into multiple
frames with multiple start frame headers, which affected SMP over
console transports.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2022-09-09 19:47:12 +00:00
Dominik Ermel
798d6c7ffc mgmt/mcumgr: Drop zst from zephyr_smp_transport_out_fn
Never used and not needed.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-09-09 18:25:44 +00:00
Christopher Friedt
cda7e31de1 util: provide IS_ARRAY_ELEMENT, ARRAY_INDEX, ARRAY_INDEX_FLOOR
`IS_ARRAY_ELEMENT(array, ptr)` behaves like `PART_OF_ARRAY()`
except that it checks that `ptr` is aligned to an array-element
boundary.

`ARRAY_INDEX(array, ptr)` returns the index of `ptr`, where
`ptr` is aligned to an array-element boundary.

`ARRAY_INDEX_FLOOR(array, ptr)` returns the index of `ptr`,
where `ptr` does not need to be aligned to an array-element
boundary.

If `CONFIG_ASSERT=y`, then `ARRAY_INDEX()` and
`ARRAY_INDEX_FLOOR()` will trigger an assertion for invalid
`ptr`.

Signed-off-by: Christopher Friedt <cfriedt@fb.com>
2022-09-09 13:20:12 -05:00
Huifeng Zhang
3d81d7f23f arch: arm64: fix the wrong way to send ipi interrupt
On GICv3, when we send an IPI interrupt, aff3, aff2 and aff1 should
be assigned a value corespond to a PE for which interrupt will be
generated. target_list only corresponds to aff0.

On real hardware, aff3, aff2, aff1 and aff0 should be treated as a
whole to determine a PE.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2022-09-09 16:36:37 +00:00
Huifeng Zhang
d614e6e359 arch: aarch32: cortex_a_r: introduce sys_read64
sys_read64 is useful when operating gicv3 register.

Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
2022-09-09 16:36:37 +00:00
Henrik Brix Andersen
86de6b71a4 sys: util: fix WAIT_FOR() timeout calculation
Use k_us_to_cyc_ceil32() for calculating the number of hardware cycles for
the given timeout value instead of using a custom calculation.

Fixes: #50032

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-09 15:28:41 +00:00
Martí Bolívar
47ef58e8ac devicetree.h: use DT_CAT<x> consistently
When I originally was writing this header, I abused DT_PROP()
liberally when trying to access other generated macros as a
convenience to save a bit of typing.

Somewhere during the v2.3 timeline, though, I realized that adding the
DT_CAT(), DT_CAT2(), etc macros was going to be needed in order to
recursively expand macro arguments, so we could do things like this:

   #define INDEX 3
   DT_FOO_BY_IDX(..., INDEX)

So I duly added those in and used them wherever something broke, but
it's been a longstanding TODO for me to clean this up and apply
recursive expansion of public DT API macro arguments consistently.

Do that now.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2022-09-09 12:19:18 +02:00
Diwakar C
6c6c496a82 espi: driver: Config spare espi vw register to OCP index
USBC port (Port 0/1/2/3) OCP (Over Current Protection) status
should be sent to PCH over eSPI VW index 0x50h. But there is
no dedicated VW register mapped to VW index 0x50h.
In this patch, configuring spare VW register SMVW06 to OCP VW
index 50h.

Signed-off-by: Diwakar C <diwakar.c@intel.com>
2022-09-09 10:11:02 +02:00
Emil Gydesen
8a652639b5 Bluetooth: Audio: Remove redundant whitespace for BT_CODEC macros
Some macros had a space after the initial tab for indentation,
which was removed.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-09-09 10:07:35 +02:00
Emil Gydesen
513259d195 Bluetooth: LC3: Fix prefer and streaming context macros
Fix the BT_CODEC_LC3_META (prefer context) and
BT_CODEC_LC3_CONFIG_META (streaming context) macros, as
they did not properly set the right values due to missing
parenthesis.

This commit also modifies the BT_CODEC_LC3_CONFIG_DATA
and BT_CODEC_LC3_DATA macros, to ensure correctness, and
to be more similar to e.g. the BT_UUID_128_ENCODE type
macros.

Also added casts to `uint8_t` to avoid compiler warnings on
e.g. GCC when assigning a non uint8_t value to a uint8_t array.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-09-09 10:07:35 +02:00
Szymon Czapracki
f4d23b6cd7 Bluetooth: Immediate Alert Client
Implement Immediate Alert Client
Move IAS into separate subdirectory

Signed-off-by: Szymon Czapracki <szymon.czapracki@codecoup.pl>

general fixes
2022-09-09 10:05:46 +02:00
Gerard Marull-Paretas
18dfc91a71 devicetree: adjust some fragments syntax
The `node@...` syntax is not accepted by the Pygments Devicetree Lexer
as it is not valid. Add dummy addresses to fix the problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-08 16:24:24 -04:00
Gerard Marull-Paretas
8582cc97fb devicetree: fix incorrect internal usage
`@internal`/`@endinternal` is used to put "internal" information within
docstring blocks, but not to hide from public documentation any
macro/function. For this purpose, we use `@cond`/`@endcond` blocks with
the INTERNAL_HIDDEN convention.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-08 16:24:24 -04:00
Gerard Marull-Paretas
64e41c0967 devicetree: improve Doxygen docstrings
- Use `@code`/`@endcode` commands so that examples will have code
  highlighing
- Remove redundant `@ref` commands
- Fix some incorrect `@p` usages (it is for function/macro parameters)
- Use `@p` name to reference macro arguments
- Convert a few "quoted strings" to literals using Markdown syntax (``)
- Always use Markdown syntax for literals (no `<tt>`, `@c`, etc.)
- Move implementation details to `@internal`/`@endinternal` blocks inside
  the relevant macro.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-08 16:24:24 -04:00
Andrei Emeltchenko
9a8ccde07c i2c: doc: Make documentation readable
Use @code .. @endcode blocks to make docs readable.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-09-08 19:29:09 +02:00
Jamie McCrae
7992256df5 mgmt: mcumgr: Add dummy SMP backend
This adds a dummy SMP backend which can be used for unit testing or
virtual interface purposes.

Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
2022-09-08 15:29:21 +00:00
Jeremy Bettis
da9448396c drivers/serial: Make serial_test a proper emul
Add emulator functionality to the serial_test driver, so that it can be
used to simulate a device on the other end of the uart.

If you don't set the buffer-size property in the dts node, there should
be effectively no change from the previous behavior.

Signed-off-by: Jeremy Bettis <jbettis@google.com>
2022-09-08 15:26:41 +00:00
Emil Gydesen
717b4fee56 Bluetooth: ISO: Remove TS size from SDU len check
The timestamp is not part of the SDU, and should
thus not be used to get the maximum SDU size.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2022-09-08 11:32:53 +00:00
Mateusz Sierszulski
2ed5763baa arch: riscv: core: Place vectors section through zephyr_linker_sources()
This commit is fixing placing the vectors section through
zephyr_linker_sources(ROM_START ...) (as done in the ARM
architecture port) so its order can be adjusted by SORT_KEY.

Fixes #49903

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
2022-09-08 10:39:31 +02:00
Daniel DeGrasse
03654969aa dts: add binding for LPC SDIF
add binding for LPC SDIF SD host controller

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-09-08 10:06:28 +02:00
Andy Ross
b141551cba arch/xtensa: Properly namespace special register API
The Xtensa arch has historically had state/user register accessor
macros with bare three-byte symbol names.  I think this might have
been in the original Cadence-contributed arch integration, but I'm not
sure.  In any case they also exist in the same names in vendor
HAL/toolchain code and are causing collisions.  We never should have
had these symbols exposed in our header.

Put them under an XTENSA_ prefix to decollide.

Signed-off-by: Andy Ross <andyross@google.com>
2022-09-07 20:28:06 -04:00
Anas Nashif
78d8ea4a62 doc: doxygen: group heap APIs
Group heap APIs under heap management.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:45:55 -04:00
Anders Storrø
bfb4e1bac4 Bluetooth: Mesh: Shell: Split out mdl shell feat
This commit splits out the model related commands from mesh shell to
separate shell modules. The purpose of this alteration is to make model
commands more flexible by letting the application itself define the
model instances.

- Move Health Client commands to separate shell module.
- Move Config Client commands to separate shell module.
- Remove Health Client instance from shell.c.
- Add Health Client instance to mesh_shell test application.
- Add util library for Mesh shell.
- Some refactoring of shell menu layout.
- Update Mesh shell documentation.

Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
2022-09-07 15:02:58 +02:00
Anas Nashif
163b99e755 doc: doxyegen: readd data structure api group
Re-add parent groups for data-structures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:36:25 +02:00
Anas Nashif
1570f1710c doc: doxygen: add disk to io_interfaces
Add disk to the io_interfaces group.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:36:25 +02:00
Anas Nashif
a8a69559cd doc: doxygen: move all IPC APIs under one group
Group all related APIs under one parent group.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:36:25 +02:00
Anas Nashif
d7f2f97fe9 doc: doxygen: add memory management group
Add new group for all memory management APIs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:36:25 +02:00
Anas Nashif
5a60fd5397 doc: doxygen: restructure device model APIs
add doxygen groups for device model under one parent group.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:36:25 +02:00
Anas Nashif
4530268e79 doc: group demand paging APIs in doxygne
add doxygen groups for demand paging under one parent group.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-09-07 10:36:25 +02:00
Gerard Marull-Paretas
be38456279 include: types: remove ulong_t
ulong_t was mainly used in MIPS/RISC-V. Just use "unsigned long".

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-06 18:16:33 +02:00
Gerard Marull-Paretas
7a54318d35 devicetree: add DT_INST_CHILD
Add the instance-based version of DT_CHILD.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-06 08:45:25 -07:00
TOKITA Hiroshi
4f7201463a dts: bindings: adc: Add RaspberryPi Pico ADC
Define RaspberryPi Pico ADC.

The ADC has internally connected temperature sensor,
Add property to enable this.

The ADC has a single VREF. VCC usually connects to it,
but it may not be in a case.
Add property to make configurable it.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-09-06 17:11:19 +02:00
Dominik Ermel
6b760b3702 mgmt/mcumgr: Remove internal functions form Zephyr header
The commit removes declarations of:
 zephyr_smp_rx_req, zephyr_smp_alloc_rsp, zephyr_smp_free_buf
from include/zephyr/mgmt/mcumgr/smp.h, as these are MCUMgr internal
functions used in SMP processing and should be not exposed
from header file that provides interface for SMP transports.
The declarations have been moved to smp_internal.h, which is
visible within MCUMgr.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-09-06 12:36:08 +02:00
Jakub Rzeszutko
66d4471d48 shell: add function checking shell readiness.
Tests with shell commands will fail if they are started
before the shell backend is initialized or started.
Adding API function: shell_ready indicating shell readiness.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2022-09-06 12:36:01 +02:00
Gerard Marull-Paretas
4aa31b4526 drivers: clock_control: gd32: initial support
This patch adds a clock control driver for GD32 platforms. It is
important to note that the driver is only able to handle peripheral
clocks, but not "system clocks" (e.g. PLL settings, SYS_CK, etc.).  On
some similar platforms (STM32) this task is embedded in the same clock
driver, performed at init time but with no options to do any
manipulation at runtime via the API calls. The clock control API as-is
is really orthogonal to "system clocks", and it is arguably a bad idea
to embed system clock init code in a clock control driver. It can be
done at SoC level still using Devicetree as a source of hardware
description/initial configuration.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00