Commit Graph

451 Commits

Author SHA1 Message Date
TOKITA Hiroshi
cbec7c8569 drivers: counter: Specify _POSIX_C_SOURCE when native_sim
When building with native_sim, We need to specify

```
 #define _POSIX_C_SOURCE 200809L
```

to make `gmtime_r` available.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-09-19 15:13:57 +02:00
Yong Cong Sin
7ebd3decd8 drivers: counter: shell: device name autocompletion
Add timer device name autocompletion to the commands.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-18 15:30:35 +02:00
Yong Cong Sin
a3d9ede341 drivers: counter: shell: change callback functions to static
These callback functions are not used outside of the file, make
them `static`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-09-18 15:30:35 +02:00
Sadik Ozer
bfb21ced8d drivers: counter: Add MAX32xxx counter driver
Common counter driver based on timer for MAX32xxx MCUs
To use as wakeup source wakeup-source parameter shall be
defined as below

&lptimer0 {
	status = "okay";
	clock-source = <ADI_MAX32_PRPH_CLK_SRC_ERTCO>;
	wakeup-source;
	counter {
		status = "okay";
	};
};

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-09-11 20:18:33 -04:00
Pisit Sawangvonganan
847a4eaad2 style: drivers: comply with MISRA C:2012 Rule 15.6
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-09-11 07:40:35 -04:00
Krzysztof Chruściński
d8c3ae0286 drivers: counter: nrfx_timer: Add barrier when reading CC
Add barrier between triggering Capture task and reading CC as otherwise
it is possible that CC read will occur before task is triggered when
bus is busy.

Add barrier between reading previous CC value and writing the new one.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-09-03 14:40:10 +01:00
Krystof Sadlik
16cdd5b852 Drivers: Counter: Added flag for counting up
Tmr and dtmr drivers were missing a flag which tells the
counter_is_conting_up function that the counter is counting up. So I've
added the flag

Signed-off-by: Krystof Sadlik <krystof.sadlik@nxp.com>
2024-09-02 09:07:57 +02:00
Emilio Benavente
cdfa11ee94 drivers: counter: mcux_lptmr: Updated lptmr to support multi instance.
Updated the counter_mcux_lptmr driver to support multiple
instances of the lptmr peripheral. Also added a new
binding property to identify if the user is using
counter-mode or pulse mode. since we were previously using the
prescaler value to check this which could be wrong
if used as a division value for getting the freq.
Added a property that allows the user to decide
what the counter value in lptmr should be divided by.
Cleaned up INIT macro for lptmr.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-08-27 12:46:11 +02:00
Raffael Rostagno
90c6106926 drivers: esp32: Interrupts flags configuration
Allows configuring interrupts flags in the device tree for
ESP32 devices.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-22 14:25:25 -04:00
Raffael Rostagno
bb746cdcc5 drivers: esp32: esp_intr_alloc return condition
Add checks to return value of esp_intr_alloc to avoid drivers init
returning 0 when interrupt allocation fails.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-22 14:25:25 -04:00
Raffael Rostagno
0b3a34cdca drivers: esp32: Interrupts priority configuration
Allows configuring interrupts priority in the device tree for
ESP32 devices.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-22 14:25:25 -04:00
Pisit Sawangvonganan
1bcae0ea9f style: drivers: comply with MISRA C:2012 Rule 15.6
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-08-20 10:33:51 +02:00
Raffael Rostagno
c1f8948e76 drivers: counter: esp32c2: Add support
Add counter support to ESP32C2 and ESP8684

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-16 14:08:22 -04:00
Francois Ramu
48b84d2c65 drivers: counter: stm32 counter timer exclude stm32 devices without APB2
The STM32 devices like stm32F0/G0/C0 which have a f0-rcc compatible
does not have APB2 prescaler : do not try to set it.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-08-13 14:56:22 +02:00
Anke Xiao
7c7760f4cd drivers: counter: update counter_mcux_rtc.c
Set LPO 1KHZ clock for RTC if clock source 'LPO' is selected.
The frdm_ke17z512 has no 32KHZ OSC, the RTC clock comes from SOSC,
RTC_CLKIN, LPO 1KHZ. But usually the SOSC is connected with 8MHZ
oscilator, so only 1kHZ LPO is usable.
Update the nxp,kinetis-rtc.yaml to select RTC clock source.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-13 09:50:13 +01:00
Manuel Argüelles
c27a8e158a drivers: counter: nxp_sys_timer: support late and short alarms
Support short relative and late alarms for NXP System Timer Module
counter driver. The late alarm detection algorithm applied, is based on
existing counter drivers.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-08-12 15:14:34 +02:00
Manuel Argüelles
896d8d6896 drivers: counter: nxp: convert STM to native driver
Convert NXP System Timer Module driver to a native driver.

Timer prescaler in tests is updated because short relative alarms
sometimes give false positives.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-08-05 07:35:57 -05:00
Ioannis Damigos
0a0bccabd8 drivers/smartbond: Fix PM device runtime support
Removed PM device runtime support from drivers in PD_SYS domain.

Update the rest device drivers to call pm_device_runtime_get/put()
functions when CONFIG_PM_DEVICE_RUNTIME is enabled.

Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
2024-06-18 14:36:38 -04:00
Yong Cong Sin
88c96f7986 drivers: counter: stm32: remove deprecated clock source Kconfigs
These clock selection Kconfigs should have been deprecated for
more than 2 releases, remove them:

- `CONFIG_COUNTER_RTC_STM32_CLOCK_SRC`
- `CONFIG_COUNTER_RTC_STM32_CLOCK_LSI`
- `CONFIG_COUNTER_RTC_STM32_CLOCK_LSE`

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-18 14:33:58 -04:00
Adam Berlinger
19b39406eb soc: st: Add support for STOP3 on STM32U5
LPTIM is not available in STOP3 mode, so RTC needs to be used instead.
This code usese similar approach as STM32WBAx for suspend to ram.
The STOP3 is disabled by default in device tree.

Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
2024-06-15 04:44:26 -04:00
Dawid Niedzwiecki
3b85e8b8ea drivers: counter: add missing include
Add missing include for get_value_64 in the counter_handlers.c file.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2024-06-14 21:14:43 -04:00
Emilio Benavente
c8d6f39e11 drivers: counter: counter_mcux_lptmr: Update to start with top value
Updated the driver to start with a value to compare the counter
with otherwise the counter will not start until the user sets
the top value manually, an issue that will occur inside the counter
test.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-06-11 17:04:26 +03:00
Declan Snyder
90986e7e22 drivers: mcux_lptmr_timer: Fix compat string error
Fix error due to compatible string changing in DT and
forgetting to update this driver with the change.

Also make the counter symbol hidden.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-06-05 04:24:30 -07:00
Declan Snyder
e4cf90faa3 drivers: counter_smartbond_timer: Fix warning
Fix the warning about control reaching end of non void
function by adding a default to the switch statement.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-06-04 14:04:09 -05:00
Ioannis Karachalios
8c651be4ef drivers: counter: smartbond: Add support for PM
This commit should add all the functionality needed for the counter
driver to work when PM is enabled. The sleep state is bound to the
counter start/stop functionality. TIMER3/4 block instances are
powered by PD_SYS and so sleep should be constrained when they are
up and running. On the other hand TIMER1/2 block instances are
powered by PD_TMR which is always on (used to generate the os tick).

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
2024-06-03 15:40:24 +02:00
Declan Snyder
eae316ebc9 dts: bindings: Rename nxp,kinetis-lptmr compat
Rename nxp,kinetis-lptmr compat to nxp,lptmr.
Because of concerns over breaking downstream users,
keep support for the old compatible temporarily and
make it clear it should be changed.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-29 07:32:25 +02:00
Yong Cong Sin
bbe5e1e6eb build: namespace the generated headers with zephyr/
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.

Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.

Updated the includes path of in-tree sources accordingly.

Most of the changes here are scripted, check the PR for more
info.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-05-28 22:03:55 +02:00
Lucas Tamborrino
e282b0ea84 soc: esp32xx: refactor clock and RTC subsystems
The RTC subsystem in espressif's SOCs, among other tasks
is responsible for clock selection for CPU and for low
power domain clocks such as RTC_SLOW and RTC_FAST.

This commit allows for proper clock source and rate
selection for CPU, using the espressif,riscv and
espressif,xtensa-lx6/7 bindings.

It also enables clock selection for RTC_FAST and RTC_SLOW,
that impacts some peripherals, such as rtc_timer.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2024-05-27 01:37:18 -07:00
Hao Luo
d7afd88e71 drivers: counter: Add support for Apollo3 SoCs counter
This commit adds support for the counter which
can be found in Apollo3 SoCs

Signed-off-by: Hao Luo <hluo@ambiq.com>
2024-05-23 11:52:37 -04:00
Declan Snyder
eeb3e808f5 drivers: nxp: Add reset code to driver inits
Add peripheral reset handling code to driver init for:

- mcan
- i2c flexcomm
- spi flexcomm
- lpc mailbox
- mrt timer

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-21 16:49:42 -04:00
Kevin Wang
52284f57ce drivers: counter: fix the bug for atcpit100
Let the callback execute after the interrupt status has cleared.
Because if the callback is executed before the interrupt status
is cleared, it might cause subsequent counter interrupts to fail to
trigger due to the callback function taking too long to execute.

Signed-off-by: Kevin Wang <kevinwang821020@google.com>
2024-05-20 15:17:15 +01:00
IBEN EL HADJ MESSAOUD Marwa
23a03b7a0a drivers: counter: ll_stm32_timer: G4X changes
Use "const LL_TIM_OC_GetCompareCHx" & "const LL_TIM_IsEnabledIT_CCx" with
STM32G4X series, following changes in stm32cube:stm32g4xx:drivers:
include:stm32g4xx_ll_tim.h

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2024-05-13 14:23:52 +02:00
IBEN EL HADJ MESSAOUD Marwa
1f16e9c44c drivers: counter: ll_stm32_timer: F4X changes
Use "const LL_TIM_OC_GetCompareCHx" & "const LL_TIM_IsEnabledIT_CCx" with
STM32F4X series, following changes in stm32cube:stm32f4xx:drivers:
include:stm32f4xx_ll_tim.h

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
2024-05-13 14:23:52 +02:00
Declan Snyder
385c6874ef drivers: nxp_pit: check if top cb is null
check if top cb is null to avoid hard fault
top cb is allowed to be null in api so this is required

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2024-05-10 18:05:32 -04:00
Abderrahmane Jarmouni
c09f1ec91a drivers: counter: stm32_rtc: fix clk disable for WBAX
clock_control_on() was called instead of clock_control_off().

Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
2024-05-09 10:29:05 +02:00
Alberto Escolar Piedras
4ccfeb7669 drivers: counter_nrfx_timer.c: Check max-frequency DT property
Check that the max-frequency DT property matches the
one provided by the nrfx HAL.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-05-08 15:58:16 -04:00
Alberto Escolar Piedras
dede897035 drivers: counter_nrfx_timer.c: Get frequency directly from DT
Instead of working it from a macro from the HAL
based on the DT address, let's just get the maximum
frequency directly from DT.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-05-08 15:58:16 -04:00
Pieter De Gendt
f147a5fec2 spelling: Replace occurrences of "iff" with "if and only if"
Spell checking tools do not recognize "iff", replace with "if and only if".
See https://en.wikipedia.org/wiki/If_and_only_if

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-05-06 14:58:08 +01:00
Marouen Ghodhbane
3fb0e784ff drivers: counter: mcux: add support for TPM
Add TPM native Zephyr driver. It's mainly inspired from the GPT
counter implementation.

Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-30 08:53:59 +02:00
Benjamin Cabé
d9c40856ea drivers: counter: fix leaking NXP counter Kconfigs
fix conditions for COUNTER_NXP_PIT and COUNTER_NXP_MRT Kconfigs

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2024-04-26 19:48:11 +01:00
Jiafei Pan
6a9407ede4 drivers: counter: gpt: enable MMIO memory mapping
Map the device memory in case of running with MMU on Cortex-A
Core.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-04-09 11:06:24 +02:00
Lucas Tamborrino
fe57a12cf2 drivers: esp32: update to hal_espressif v5.1
Modify necessary drivers to meet updated hal.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-04-05 13:39:53 +02:00
Daniel DeGrasse
81ec61c085 drivers: clock_control: clock_control_mcux_syscon: make clock IDs unique
Syscon clock driver previously used a sequence where clock IDs increased
sequentially. This had a few disadvantages:
- if a new SOC was introduced with more instances of a given IP, the
  clock ID could not be sequential with the remaining IDs
- chance of collisions between clock IDs was relatively high

To resolve this, define LPC clock IDs using a bitmask macro. Note that
the CTIMER clock IDs are used within SOC clock files to perform clock
init, and the macro requires that the clock ID expand to an integer
rather than a expression with bitshifts (hence why the macro is not used
for these IDs)

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-19 18:43:58 +00:00
Daniel DeGrasse
8347abd001 drivers: counter: counter_nxp_mrt: include soc.h for MRT CMSIS defines
Include soc.h in nxp MRT driver, so that CMSIS register definitions will
be available in this file

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-03-15 17:12:08 -04:00
Krisna Resi
7dd7175336 drivers: rtc: Fix RTC alarm when using both CONFIG_COUNTER and CONFIG_PM
It is found that when we use CONFIG_COUNTER and CONFIG_PM concurrently,
the RTC alarm callback can be used only once (in some cases, it just
won't work at all, e.g., using CONFIG_BT). By set the DBP bit on PWR
control register 1 via LL_PWR_EnableBkUpAccess function to temporarily
disable write protection every time we assign RTC alarm, we can register
alarm callback correctly. Tested on Nucleo WB55RG.

Fixes: #68673
Signed-off-by: Krisna Resi <krisna_resi@ymail.com>
2024-03-15 09:33:14 +00:00
Alberto Escolar Piedras
62e9a38590 drivers counter_nrfx_rtc: Fix for simulation
For simulation, let's convert the hardcoded DT/real
HW address to the valid addr for simulation on the fly.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-12 17:57:18 +00:00
Marcin Niestroj
227462eda9 drivers: counter: stm32: move reset_dt_spec from data to config
Move 'reset' member, which is const, from driver data to driver config.
This allows to reduce flash usage by few bytes.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2024-03-11 17:55:17 +00:00
Alberto Escolar Piedras
f9d5e8458c drivers/counter nrfx: Fix with DT instance not matching device instance
478530ec0aa1fe5f481786c25d50f7a081b22208 introduced a bug
where if the DT index while iterating its DT structure
initialization does not match the actual peripheral instance,
or if the device instance string is not just a simple integer,
but a more complex string like "00", or "02", either
the wrong peripheral address would be used, or the file
would failt to compile.

Let's fix this by reverting that change, and instead, for
simulation converting the hardcoded DT/real HW address
to the valid addr for simulation on the fly.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-11 14:09:16 +00:00
Alberto Escolar Piedras
ad7086a2df drivers counter nrfx RTC: Fix ISR prototype
The ISR prototype is not matching the
signature for interrupt handlers, which results in
build warnings.
Let's fix it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-03-08 19:00:46 +01:00
Emilio Benavente
8bb95d33be drivers: counter: Adding Mutli Channel PIT Support
Updating the nxp,pit driver to support mutliple
channels. Updating the dts and board overlays
to account for the changes.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-03-07 13:23:58 -06:00