drivers: counter: stm32 counter timer exclude stm32 devices without APB2
The STM32 devices like stm32F0/G0/C0 which have a f0-rcc compatible does not have APB2 prescaler : do not try to set it. Signed-off-by: Francois Ramu <francois.ramu@st.com>
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e18254901c
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48b84d2c65
@ -395,18 +395,18 @@ static int counter_stm32_get_tim_clk(const struct stm32_pclken *pclken, uint32_t
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apb_psc = (uint32_t)(READ_BIT(RCC->APB1DIVR, RCC_APB1DIVR_APB1DIV));
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#else
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apb_psc = STM32_APB1_PRESCALER;
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#endif
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#endif /* CONFIG_SOC_SERIES_STM32MP1X */
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}
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#if !defined(CONFIG_SOC_SERIES_STM32F0X) && !defined(CONFIG_SOC_SERIES_STM32G0X)
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#if !DT_HAS_COMPAT_STATUS_OKAY(st_stm32f0_rcc)
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else {
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#if defined(CONFIG_SOC_SERIES_STM32MP1X)
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apb_psc = (uint32_t)(READ_BIT(RCC->APB2DIVR, RCC_APB2DIVR_APB2DIV));
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#else
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apb_psc = STM32_APB2_PRESCALER;
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#endif
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#endif /* CONFIG_SOC_SERIES_STM32MP1X */
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}
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#endif
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#endif
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#endif /* ! st_stm32f0_rcc */
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#endif /* CONFIG_SOC_SERIES_STM32H7X */
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#if defined(RCC_DCKCFGR_TIMPRE) || defined(RCC_DCKCFGR1_TIMPRE) || \
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defined(RCC_CFGR_TIMPRE)
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