Pull latest revision of the uoscore-uedhoc module and align
corresponding CMake file with the changes.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add CAN test overlays for Nucleo N657x0-Q and STM32N6570 DK boards.
Userspace needs to be disabled for the tests to pass.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
In zephyr_get_XYZ_for_lang() functions in extensions.cmake we try to mimic
what cmake does in generation time to filter out SHELL: tags. However,
this filtering was only done for list entries that did not contain
generator expressions.
This causes broken command lines for e.g. e.g. for the kobject_hash*c
if the toolchain puts "SHELL: $<$<COMPILER_LANGUAGE:C>:some thing>"
into the options.
Signed-off-by: Björn Bergman <bjorn.bergman@iar.com>
Added a changelog entry in the Deprecated and New categories to document
the Kconfig changes for the Bluetooth Device Information Service (DIS).
Updated the migration guide to provide instructions on how to
transition from the old configuration scheme to the new one.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Added new Kconfig option set that allows the user to control the
presence of the following optional characteristics:
- Manufacturer Name String
- Model Number String
Depreacted the old configuration that can be deleted in the future
Zephyr releases.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Add the memory region reserved in DRAM for VirtIO and Vring data
for IPC. Add this as the default chosen zephyr,ipc_shm.
Signed-off-by: Andrew Davis <afd@ti.com>
Add the memory region reserved in DRAM for VirtIO and Vring data
for IPC. Add this as the default chosen zephyr,ipc_shm.
Signed-off-by: Andrew Davis <afd@ti.com>
Add the memory region reserved in DRAM for VirtIO and Vring data
for IPC. Add this as the default chosen zephyr,ipc_shm.
Signed-off-by: Andrew Davis <afd@ti.com>
Currently the resource table is added to the memory-region labeled DDR.
This region can also be extra space for code/data, although this is
not yet implemented. This will mean that the linker is free to put
the resource table *after* the code/data sections in DDR. The resource
table must be at the start of the assigned DRAM area for the remote
core to support early-boot/late-attach usecases.
To solve this, we carveout the first 4KB of our DRAM area specifically
for the resource table. This matches how this issue was solved for the
K3 R5F cores.
To make this clear we label this memory-region "RSC_TABLE". This is
done at the linker file level, which is common for all K3 M4 boards
and so we update all 3 such boards in this one patch instead of
patch-per-board.
Signed-off-by: Andrew Davis <afd@ti.com>
The current code assumes (especially in the lp50xx_set_color function)
that the number of LED colors defined in DT is not greater than 3. But
since this is not checked, then this is not necessarily the case...
This patch consolidates the initialization of the lp50xx LED driver by
checking the number of colors for each LED found in DT.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Honor Kconfig option `BT_CTLR_TX_PWR_ANTENNA` for limiting the maximum TX
power. The default value for this option is 0 dBm, which means that after
this change the actual TX power is likely lower than before, unless
increased by this option.
Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>
Fixes an issue when using custom payloads where the size was still
using the zcbor buffer instead of the size of the network buffer
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Uses the clear imgtool argument to set the encrypted flag in the
header of the signed hex output, without encrypting the data. This
addresses an issue whereby the first update would swap images and
leave the swapped output in the secondary slot without encryption
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This patch adds a test suite for the inspection API. The test checks
that the symbols exported by the 'inspect_ext' extension are correctly
mapped inside their corresponding regions and sections.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
Add APIs to inspect the contents of an ELF file loaded as an extension.
This is useful for applications that need to access the contents of the
extension in a more fine-grained way than the existing LLEXT APIs.
Use of these APIs requires the 'keep_elf_data' option to be provided via
struct llext_load_param to the 'llext_load()' call.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
This is required for the functions that inspect the ELF file to work
properly. The user must then call llext_free_inspection_data() before
calling llext_unload() to free the memory left allocated in the loader
and extension memory.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
Adds a help message which gives details on a common issue with
snippets where the roots are not known or a snippet is applied
to multiple images
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
It's possible to have MEM_ATTR=n and ARM_MPU=y. This fixes the compile
issue with it by compiling out the calls to define the DT mpu regions.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
I think my original idea with this default MPU setup was that the top
bits of the (fast) SRAM region might be useful for host DMA that
needed better latencies than the (extremely slow) system DRAM
mappings. So it should be left uncached for safety.
But unfortunately the author[1] of the SOF heap integration for this
platform decided to size the heap dynamically to use most of the SRAM
block (the vectors and a few other bits live at the bottom, but most
of .text is in DRAM).
Needless to say, an uncached heap is sort of a performance disaster.
It worked OK for default copy-only topologies but fell over the moment
we turned on nontrivial processing.
[1] Um... Hi. Yeah, that's me too.
Signed-off-by: Andy Ross <andyross@google.com>
Recent Python interpreters have started tossing bus errors from this
12-byte string search (the loader is looking for the winstream
descriptor in the live firmware image). My guess is that there's a
SIMD optimization that's been added that's trying to do e.g. a 16 byte
load, and something in the fabric is kicking that out. Note that this
is 100% a software change: the same hardware with one version of the
host environment works, and an update breaks it.
But really I have no idea what's happening here, the memory region in
question is documented as system DRAM, the same bus regular process
memory is on (it's just not kernel-utilized memory). All I know is
that the bus error is introduced with a Python upgrade from 3.8.20 to
3.11.10.
Regardless, it's no great hardship to do the search on 64 bit chunks.
Signed-off-by: Andy Ross <andyross@google.com>
This commit updates cortex_m related code to align it with the rules from
.clang-format. This is done to simplify future changes in these files as
we are about to implement use_switch support.
Some rules conflict with checkpatch and therefore some small part of the
code locally disable clang-format.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
After adding more detailed information to the reason field in
Twister report, update twister_report_analyzer.py to group
CMake and Build failures.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Updated test_report_summary to match new string with detailed
reason of build failure.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Extended the reason field in Twister report to include
more detailed information for 'Build failure' and
'CMake build failure'
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Since it was added, `arch.interrupt.gen_isr_table_local.arm_mainline`
filters on `CONFIG_ARMV6_M_ARMV8_M_BASELINE`. I'm not entirely sure whether
this was intentional, but this seems odd to me given a) the naming of the
test b) that the `platform_allow` is `qemu_cortex_m3` and c) that the
`arch.interrupt.gen_isr_table.arm_mainline` test it inherits part of its
config from filters on `CONFIG_ARMV7_M_ARMV8_M_MAINLINE`.
The current filtering setup also means that a command like
`west twister -c -T tests/kernel/gen_isr_table/` currently filters out all
of the `*gen_isr_table_local*` tests which was a surprise to me when
testing locally (no tests broke for a change I made as they were
all filtered out).
Assuming this is undesireable, change the filter to check against
`CONFIG_ARMV7_M_ARMV8_M_MAINLINE` to make it possible to run the tests
on the expected platform without needing to work around the filter.
Signed-off-by: Jonathon Penix <jpenix@quicinc.com>
Added the test configuration for nRF54L20 for the following tests:
- adc_api
- adc_error_cases
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Introduce two new kconfig options in order
to be able to define custom named fatfs
mount points. If activated replace the static
FF_VOLUME_STRS approach with the runtime
generated VolumeStr array containing those
mount points.
Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
This adds a on target performance test for Settings SS. Using this test
performance of the Setting SS + NVS/ZMS backend can be benchmarked.
The test repeatedly write 128 settings entries. Each setting entry
has a size of 4 bytes, and path length of 16 bytes (excluding the
null-terminator).
The test has two variants, with and without Bluetooth scan running.
This is useful to benchmark performance along with some component
of BT subsystem activated.
The test could be enhanced in future to include or create combinations
of different functionalities running, when agreesive store operations
are happening.
Signed-off-by: Omkar Kulkarni <omkar.kulkarni@nordicsemi.no>
Some flash devices enable entering the 4-byte address mode
by setting BIT(7) in a special register via a write instruction 0x17.
The support for this method is indicated in BIT(3) of
Enter 4-Byte Addressing byte in 16th DWORD of the JEDEC Basic
Flash Parameter Table.
Infineon's S25FL512S is an example flash device with this feature.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The SoC State Change Power Domain driver issues TURN_ON/
TURN_OFF actions to all devices registered with it for
certain power states that can be specified via device tree.
This test exercises the functionality of this driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This driver triggers the TURN_ON and TURN_OFF actions for certain
power states. These power states are specified via device tree.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit adds a missing default value for the `DCHACHE_LINE_SIZE` option
for the `qemu_xtensa/sample_controller32/mpu` platform. This is required
after 8b39d4a613 added a build assert
checking this value against `core-isa.h` from Xtensa HAL.
Fixes#85591.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Update the HW models module to:
5dc34b26662c6ec91edf1174d775d78590b1a05b
Including the following:
* 5dc34b2 CLOCK (52-54): Silly bugfix
* 4f622b7 CLOCK (52-54): Make TASK_*CLKSTOP instantaneous and clear
LFCLK.STAT
* 07b1bdb RADIO 54: Correct 2 comments related the CCM trigger
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Taking a look at the schematic shows that
tx-enable-gpios and dio2-tx-enable were directly connected.
This had the effect tx-enable-gpios was trying to pull the line down
while SX1262 is pulling the same line high. This increased
the power consumption.
Now only the SX1262 sets the antenna to tx via dio2-tx-enable.
Setting the antenna to rx is still done via the rx-enable-gpios.
The antenna defaults to rx if not in use.
Signed-off-by: Carlo Weidinger <carlo.weidinger@protonmail.com>
Enable wdt_error_cases test on nRF5340dk.
Define valid test configuration for that target
(reuse from nRF54H/nRF54L).
Add target to the platform_allow.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Add UART test overlays for Nucleo N657x0-Q and STM32N6570 DK boards.
Remove non serial boot conf file since they are now unnecessary.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
