It is found that when we use CONFIG_COUNTER and CONFIG_PM concurrently,
the RTC alarm callback can be used only once (in some cases, it just
won't work at all, e.g., using CONFIG_BT). By set the DBP bit on PWR
control register 1 via LL_PWR_EnableBkUpAccess function to temporarily
disable write protection every time we assign RTC alarm, we can register
alarm callback correctly. Tested on Nucleo WB55RG.
Fixes: #68673
Signed-off-by: Krisna Resi <krisna_resi@ymail.com>
In order to reduce dns resolve requests when using the dns
resolver an optional cache was introduced. This cache
retains query requests for the TTL duration and therefore
prevents premature refetching of DNS RRs.
Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
Implement a sensor for the output diagnostics of the low side
switch BD8LB600FS.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Split up the driver for the low side switch BD8LB600FS into a GPIO
and MFD part.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Transition to a low power DMI L1 state should be allowed only after all
pending DMA channels transfers have started.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Add support for XRGB32 pixel format as this is useful to test camera
and display drivers on i.MX RT11xx
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
Dependencies of NXP_IMXRT_BOOT_HEADER were set incorrectly for the
RT11xx series part when building a dual core image. The boot header
should be enabled by default for the primary M7 core, and always
disabled when MCUBOOT is used or the M4 core is targeted
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
due to MQTT now have ALPN support
the example code of using ALPN to connect MQTT
over port 443 need to be added
Signed-off-by: sukrit buddeewong <sukrit.omu@gmail.com>
Implement the ALPN Support for Mqtt Library allow mqtt to have
ability to utilize ALPN for connect to server that support ALPN, such
as AWS IoT Core
Signed-off-by: sukrit buddeewong <sukrit.omu@gmail.com>
It is often desired to maximize the chances of receiving advertising
when scanning. To achieve this, the scanner should be enabled all the time.
Some controller implementations (like Nordic's SoftDevice Controller)
handle scheduling differently when scan_window = scan_interval.
Having a macro that defines this scanning configuration simplifies
writing applications.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Change the suspend/resume code to ensure that the interrupt are disabled
before changing the pin configuration. The current sequence has been
reported to cause spurious readouts on some platforms, this takes the
existing code and duplicates for the suspend and resume case, but swaps
the interrupt disable and configure for the suspend case.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the filter from CPU_HAS_MPU to ARCH_HAS_USERSPACE to
when filtering boards which support userspace.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Validate the new relocations for BL and BLX instructions by
creating a new test extension which contains a chain of global
functions in a pseudo random order to (hopefully) generate
relative jumps in both positive and negative directions.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
Add support for the relocation type R_ARM_ARM_THM_CALL which is
produced for the ARM Thumb BL and BLX (branch immediate)
instructions.
These instructions are used for non-static functions like
void test1(void)
{
}
void main(void)
{
test1();
}
Without support for this relocation, test1() has to be static.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
The opval argument of arch_elf_relocate() was modified by
adding the value stored at opaddr before passing it to
arch_elf_relocate(). This presumed that the addend would
always be stored as a raw value at opaddr, which is not the
case for all relocation types.
This PR modifies opval to be the absolute address of opval,
and moves the addition of the addend from llext_link_plt()
to the implementation of arch_elf_relocate().
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
RASID must not use 0 for any slot. According with documentation:
"""The operation of the processor is undefined if any two of the
four ASIDs are equal or if it contains an ASID of zero"""
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
