Commit Graph

61841 Commits

Author SHA1 Message Date
Gerard Marull-Paretas
052d0cd0ba boards: arm: bbc_microbit_v2: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
1faacdaafa boards: arm: bbc_microbit: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
0b026a894c boards: arm: actinius_icarus_som: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
143b98ef05 boards: arm: actinius_icarus_bee: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
ba8bafb5d1 boards: arm: actinius_icarus: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
2dd520581c boards: arm: arduino_nano_33_ble: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
49c0adf74a boards: arm: adafruit_feather_nrf52840: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
776b9f4bef boards: arm: 96b_nitrogen: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
ffa240c91b boards: arm: 96b_carbon_nrf51: migrate to pinctrl
Use pinctrl instead of `-pin` properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
f526c057ba boards: shields: sparkfun_sara_r4: delete redundant overlay
The nrf52840dk_nrf52840 already maps arduino_serial to the overlayed
pins.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
8b91cb0cd4 scripts: utils: pinctrl_nrf_migrate: support more peripherals
Add support for more peripherals:

- I2C
- SPI (master mode assumed)
- PDM
- QDEC
- QSPI
- PWM
- I2S

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Gerard Marull-Paretas
c1ad91405d drivers: pinctrl: nrf: fix nordic,nrf-twi handling on nRF51/52
The NRF_TWI_Type struct doesn't have an homogeneous layout between
nRF51/52 series. This patch tries to select the right layout based on
selected SoC.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-21 15:09:28 +01:00
Alex Sergeev
49edd8558b drivers: ethernet: stm32: avoid segfault if cannot get RX buffer
Avoids segfault in situations when we can't acquire an RX buffer, and VLAN
or PTP code is enabled which tries to inspect packets by adding a pkt
check.

Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
2022-03-21 08:44:58 -05:00
Vinayak Kariappa Chettimada
54ddd8d031 Bluetooth: Controller: nRF53: Fix compile error when debug pins enabled
Fix compile error when debug pins are enabled for nRF53
Series SoCs.

Regression introduced in commit 743b0583fc ("Bluetooth:
controller: Enable debug pins with TF-M enabled").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-03-21 12:50:19 +01:00
Vinayak Kariappa Chettimada
9b7fb70539 tests: Bluetooth: bsim: Use non-zero SID to catch regressions
Use non-zero SID value so that regressions in use of
Periodic Advertiser List implementation is catch in
testing.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-03-21 12:49:45 +01:00
Vinayak Kariappa Chettimada
8c89a9fd42 Bluetooth: Controller: Fix missing periodic accept list SID assignment
Fix missing assignment of SID in the Periodic Advertiser
Accept List. This cause advertisers with SID 0 only to be
accepted when using list.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-03-21 12:49:45 +01:00
Vinayak Kariappa Chettimada
311eabeda1 Bluetooth: Controller: Fix Tx Power in Extended and Periodic Adv Report
Fix Tx Power field in Extended and Periodic Advertising
for chain PDU reception. Tx Power shall be from the
current PDU containing the AD Data, Scan Response Data and
from first PDU of Periodic Advertising Data be used to
prepare the HCI report.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-03-21 12:49:37 +01:00
Jaxson Han
a7a8a64e9c arch32: Fix incorrect exc_exit sequence
The incorrect sequence will cause the thread cannot be aborted in the
ISR context. The following test case failed:
tests/kernel/fatal/exception/kernel.common.stack_sentinel.

The stack sentinel detects the stack overflow as normal during a timer
ISR exit. Note that, currently, the stack overflow detection is behind
the context switch checking, and then the detection will call svc to
raise a fatal error resulting in increasing the nested counter(+1). At
this point, it needs a context switch to finally abort the thread.
However, after the fatal error handling, the program cannot do a context
switch either during the svc exit[1], or during the timer ISR exit[2].

[1] is because the svc context is in an interrupt nested state (the
nested counter is 2).
[2] is because the current point (after svc context pop out) is right
behind the switch checking.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2022-03-21 07:31:29 -04:00
Jaxson Han
05512aaef2 include: arch32: Fix the incorrect type
The temp val should be uint64_t in read_sysreg64 instead of uint32_t.
The incorrect type uint32_t will cause an issue:
mrrc instruction needs 2 registers when reading from a 64-bit system
register. The type uint32_t tells GCC only to save/restore one register,
so after the mrrc is executed, the other would clash.

Signed-off-by: Jaxson Han <jaxson.han@arm.com>
2022-03-21 07:31:29 -04:00
Nicolas Pitre
c8bfc2afda riscv: make arch_is_user_context() SMP compatible
This is painful. There is no way for u-mode code to know if we're
currently executing in u-mode without generating a fault, besides
stealing a general purpose register away from the standard ABI
that is. And a global variable doesn't work on SMP as this must be
per-CPU and we could be migrated to another CPU just at the right
moment to peek at the wrong CPU variable (and u-mode can't disable
preemption either).

So, given that we'll have to pay the price of an exception entry
anyway, let's at least make it free to privileged threads by using
the mscratch register as the non-user context indicator (it must
be zero in m-mode for exception entry to work properly). In the
case of u-mode we'll simulate a proper return value in the
exception trap code. Let's settle on the return value in t0
and omit the volatile to give the compiler a chance to cache
the result.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
af2d875c5d riscv: isr.S: compute _current_cpu using CPU number on SMP
To do so efficiently on systems without the mul instruction, we use
shifts and adds which is faster and sometimes smaller than a plain loop.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
4f5374854e riscv: isr.S: dedicate a register to &current_cpu
Stop using &_kernel as this is not SMP friendly. Let's use s0 (after
preserving its content) to hold &current_cpu instead so it won't have
to be reloaded 	each time it is needed. This will be even more relevant
when SMP support is added.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
69d06a901c riscv: isr.S: optimize FP regs save/restore decision
Rely on mstatus rather than thread->base.user_options since it is always
up to date (updated by z_riscv_switch) to simplify the code and be SMP
proof. Also carry over SF_INIT to the mstatus being restored in case
it was changed in the mean time.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
ce8dabfe9e riscv: implement arch_switch()
The move to arch_switch() is a prerequisite for SMP support.

Make it optimal without the need for an ECALL roundtrip on every
context switch. Performance numbers from tests/benchmarks/sched:

Before:
unpend  107 ready  102 switch  188 pend  218 tot  615 (avg  615)

After:
unpend  107 ready  102 switch  170 pend  217 tot  596 (avg  595)

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
247d2c8e3b riscv: move the tp register from caller-saved to callee-saved
This is a per-thread register that gets updated only when context
switching. No need to load and save it on every exception entry.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
50c0df1bd2 riscv: align struct __esf properly
The minimum stack alignment is 16. Therefore, the stack space to store
a struct __esf object must be rounded up to the next 16-byte boundary.

It is not sufficient to do the rounding on the __z_arch_esf_t_SIZEOF
definition. When the stack is constructed in arch_new_thread() it is
also necessary to do the rounding there too.

Let's make the structure itself carry the alignment attribute instead to
make it work in all cases.

While at it, remove the unused _K_THREAD_NO_FLOAT_SIZEOF definition.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
df852a0b77 riscv: implement CONFIG_IRQ_OFFLOAD_NESTED
It can easily be done now, so why not. Suffice to increment the nested
count like with actual IRQs.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
cb5221c087 riscv: irq_offload: simpler implementation
Get rid of all those global variables and IRQ locking.
Use the regular IRQ exit path to let tests validate preemption properly.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
a50c433012 riscv: exception code mega simplification and optimization
Complete revamp of the exception entry code, including syscall handling.
Proper syscall frame exception trigger. Many correctness fixes, hacks
removal, etc. etc.

I tried to make this into several commits, but this stuff is all
inter-related and a pain to split.

The diffstat summary:

 14 files changed, 250 insertions(+), 802 deletions(-)

Binary size (before):

   text	   data	    bss	    dec	    hex	filename
   1104	      0	      0	   1104	    450	isr.S.obj
     64	      0	      0	     64	     40	userspace.S.obj

Binary size (after):

   text	   data	    bss	    dec	    hex	filename
    600	      0	      0	    600	    258	isr.S.obj
     36	      0	      0	     36	     24	userspace.S.obj

Run of samples/userspace/syscall_perf (before):

*** Booting Zephyr OS build zephyr-v3.0.0-325-g3748accae018  ***
Main Thread started; qemu_riscv32
Supervisor thread started
User thread started
Supervisor thread(0x80010048):       384 cycles	     509 instructions
User thread(0x80010140):           77312 cycles	   77437 instructions

Run of samples/userspace/syscall_perf (after):

*** Booting Zephyr OS build zephyr-v3.0.0-326-g4c877a2753b3  ***
Main Thread started; qemu_riscv32
Supervisor thread started
User thread started
Supervisor thread(0x80010048):       384 cycles	     509 instructions
User thread(0x80010138):            7040 cycles     7165 instructions

Yes, that's more than a 10x speed-up!

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
bfb7919ed0 riscv: better abstraction for register-wide FP load/store opcodes
Same rationale as preceding commit. Let's create pseudo-instructions in
assembly scope to make the code more uniform and readable.

Furthermore the definition of COPY_ESF_FP() was wrong as the width of
floating point registers vary not according to CONFIG_64BIT but
CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION. It is therefore wrong to use
lr/sr (previously RV_OP_LOADREG/RV_OP_STOREREG) and a regular temporary
register to transfer such content.

Note: There are far more efficient ways to copy FP context around but
      such optimisations will come separately.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
1fd79b3ef4 riscv: better abstraction for register-wide load/store opcodes
Those are prominent enough that having RV_OP_LOADREG and RV_OP_STOREREG
shouting at you all over the place is rather unpleasant and bad taste.

Let's create pseudo-instructions of our own with assembler macros
rather than preprocessor defines and only in assembly scope.
This makes the asm code way more uniform and readable.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
94f39e5a80 riscv: fix wrong access width in assembly code
The thread->base.user_options field is an uint8_t. Access it using lb.
A "copy" of it is made into __esf.fp_state. Make that field an uint8_t
too and access it with lb/sb.

_callee_saved.fcsr is an uint32_t. Access it with lw/sw.
Ditto for is_user_mode.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
9ed17943b9 riscv: use simplest asm expression when possible
Let's take advantage of assembler pseudoinstructions:

- convert `addi rd, rs, 0` to `mv rd, rs`
- convert `jal x0, somewhere` to `j somewhere`
- convert `csrrs x0, csrreg, rs` to `csrs csrreg, rs`
- convert `fscsr x0, rs` to `fscsr rs`

And simplify zero offsets to simply 0.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
f2bb937547 Revert "arch/riscv: Get current CPU properly instead of assuming single CPU"
This reverts commit 8686ab5472.

The purpose of this commit will be reintroduced later on top of
a cleaner codebase.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
442ab22bdc Revert "arch/riscv: Use arch_switch() for context swap"
This reverts commit be28de692c.

The purpose of this commit will be reintroduced later on top of
a cleaner codebase.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Nicolas Pitre
13a7047ea9 Revert "arch/riscv: Do not use irq_lock() on arch_irq_offload"
This reverts commit b0458201cc.

The purpose of this commit will be reintroduced later on top of
a cleaner codebase.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2022-03-21 07:28:05 -04:00
Sjors Hettinga
1165bd667f net: http: Allow a content_len of 4GB
Instead of maximally 99999 bytes allow a content_len of 4GB.

Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
2022-03-21 10:16:21 +01:00
Alexander Wachter
118a8d83cc maintainers: set henrikbrixandersen as canbus maintainer
Set henrikbrixandersen as the new maintainer of canbus

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2022-03-21 10:16:04 +01:00
Henrik Brix Andersen
03accdb6a8 drivers: can: guard against bitrate of zero
Guard against attempts to set a bitrate of zero as this will lead to
division-by-zero.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-21 10:15:45 +01:00
Piotr Pryga
9cb4e58a48 Bluetooth: Controller: df: make radio_df_vendor_hal.h compile in always
The header file radio_df_vendor_hal.h was conditionally copiled in.
There were a dependency on a CONFIG_BT_CTRL_DR. The dependency is
removed because radio_df_vendor_hal.h and radio_df.h hasn't got any
DF related type dependencies. What more it allows to use IS_ENABLED
for code that uses types and functions defined in radio_df.h.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-03-21 10:15:39 +01:00
Piotr Pryga
07f02f90ae Bluetooth: Conroller: radio: Clear EVENTS_CTEPRESENT always if DF supp
The EVENTS_CTEPRESENT is available when radio peripheral has
direction finding support. The event is set if received
PDU has CTEInfo and there were collected IQ samples during
CTE reception.

The event should be cleared always when other events are cleared.
That guarantees that the event is not set when use of radio for
following activities.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-03-21 10:15:39 +01:00
Piotr Pryga
15b1c3eaf8 Bluetooth: Controller: lll: df: Check CTEPRESENT before radio reset
The radio_df_cte_ready function returns state of EVENTS_CTEPRESENT.
The function may not be used in create_iq_report function, because
it is called after lll_isr_rx_status_reset. The lll_isr_rx_status-
_reset clears EVENTS_CTEPRESENT value.

The result of this calls chain is lack of IQ sample report no matter
if the PDU has CTEInfo and radio has collected IQ samples.

To fix the problem, state of EVENTS_CTEPRESENT has to be get when
e.g. rssi_ready is get.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2022-03-21 10:15:39 +01:00
Derek Snell
785971b5a0 drivers: gpio: fix when 4 or less PINT IRQs
driver required PIN_INT4_IRQ.  Some devices have 4 or less PINT IRQs.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
2022-03-21 10:15:13 +01:00
Vinayak Kariappa Chettimada
7f97c04bf8 Bluetooth: Controller: Fix jitter between primary and auxiliary PDU
As Extended Advertising primary PDUs do not use ticker
remainder value for fine scheduling of radio events, do not
use the remainder value for auxiliary PDUs. This fixes the
jitter in the aux_offset value that caused the auxiliary PDU
being observed to be late compared to the aux_offset value
filled in the primary PDUs.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-03-21 10:14:59 +01:00
Szymon Janc
e932564f3a tests/bluetooth/tester: Enable security validation for GATT subsciption
This was affecting following qualification test cases:
GAP/SEC/SEM/BV-56-C
GAP/SEC/SEM/BV-57-C
GAP/SEC/SEM/BV-58-C
GAP/SEC/SEM/BV-59-C
GAP/SEC/SEM/BV-60-C
GAP/SEC/SEM/BV-61-C

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2022-03-21 10:14:53 +01:00
Szymon Janc
2f93808bcc Bluetooth: Host: Validate security on GATT subscription
Core Specification 5.3 clarified security requirements for GATT client
when handling incoming notifications and indications.

Vol 3: Part C: 10.3.2.2:
"...Since the configuration is persistent across a disconnection and
reconnection, the client shall check the security requirements against
the configuration upon a reconnection before processing any indications
or notifications from the server. Any notifications received before
the security requirements are met shall be ignored. Any indications
received before the security requirements are met shall be confirmed
and then discarded. ..."

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2022-03-21 10:14:53 +01:00
Dominik Ermel
9a0174df40 mgmt/mcumgr: Storeage erase may bus fault when no device
The commit fixes erase storage command so that it would return with
error code instead of bus faulting when no device is attached
to flash storage.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-03-21 10:14:41 +01:00
Dominik Ermel
c842bb1ac1 mgmg/mcumgr/lib: Fix image commandis bus faults when no device
It is possible for flash partition to have no device attached
which may cause image commands to bus fault device.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2022-03-21 10:14:41 +01:00
Carlo Caione
3fc5150f36 ipc_service: static_vrings: Use atomic helpers
Use the correct atomic helpers when accessing atomic_t variables and fix
a possible race condition.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-03-21 10:14:32 +01:00
Mariusz Skamra
09b2fe1893 Bluetooth: shell: Add Hearing Access Service
Add Hearing Access Service to Bluetooth shell application.

Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
2022-03-21 10:14:15 +01:00