Commit Graph

99802 Commits

Author SHA1 Message Date
Flavio Ceolin
0205c7d511 pm: Remove deprecated symbol references
Do not reference PM_DEVICE_RUNTIME_EXCLUSIVE

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2024-08-08 15:38:04 +02:00
Seppo Takalo
e3100c6f3a net: lwm2m: Allow SenML-CBOR floats decoded as int
SenML is technically a JSON based format which can
be encoded as a CBOR. SenML-CBOR specification in
RFC 8428 section 6 states that numbers can be decoded
as an integer.

Also RFC 7049 section 4.2 states that JSON numbers
without fractional part can be decoded as an integer.

I have seen with one commercial LwM2M platform that
the decoder  they use, sends floating point values as
integers, if there is no fractional part.

So LwM2M engine cannot assume from the path that
the incomming number is either float or int. Accept both.

Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
2024-08-08 15:37:56 +02:00
Tomi Fontanilles
2249b87b5e drivers: hwinfo: add the HWINFO_HAS_DRIVER Kconfig option
Introduce a Kconfig option to signal whether a HW info driver is
available when HWINFO is enabled.

Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
2024-08-08 15:37:40 +02:00
Konrad Derda
5e4e63ba8f net: ipv6: route: get nexthop's LL address only if relevant
This commit moves reading nexthop's LL address only if it's supported
by a given neighbor and can be used for routing between interfaces.

Signed-off-by: Konrad Derda <konrad.derda@nordicsemi.no>
2024-08-08 15:37:32 +02:00
Jordan Yates
5d87cd654f sdhc: sdhc_spi: compile-time determine if sdhc_ones needed
Use the new `SPI_MOSI_OVERRUN_DT` macro to determine at compile-time
whether the 512 byte array of `sdhc_ones` is required.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-08-08 06:17:45 -04:00
Jordan Yates
2709879c06 spi: expose overrun-character property from dt
Expose the new common property `overrun-character` from the devicetree
nodes, falling back to the `SPI_MOSI_OVERRUN_UNKNOWN` value.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-08-08 06:17:45 -04:00
Jordan Yates
76d43a8f62 dts: spi: move overrun-character from Nordic to base
Move the `overrun-character` property from the common Nordic SPI
binding to the `spi-controller` base binding. This gives users of the
SPI interface a way to query what the default value is at compile-time,
and potentially avoid allocation of large constant buffers.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-08-08 06:17:45 -04:00
Pisit Sawangvonganan
dcd0a2756d drivers: spi: remove '&' when assigning init_fn
Remove address-of operator ('&') when assigning `init_fn`
function pointer in `DEVICE_DT_INST_DEFINE` macro.

This change aims to maintain consistency among the drivers in
`drivers/spi`, ensuring that all function pointer assignments
follow the same pattern.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-08-08 06:08:04 -04:00
Anke Xiao
e69bfa5e7d tests: drivers: spi: add configuration for ke17z to test loopback
Add spi configurations of NXP frdm_ke17z and frdm_ke17z512 boards,
tested spi_loopback sample for lpspi drivers.
Update the "HAS_MCUX_*" kconfig to "DT_HAS_*" in testcase.yaml

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-08 06:07:51 -04:00
Anke Xiao
f1ef690224 boards: nxp: enable lpspi and edma driver for ke17z
Enable lpspi and edma driver for frdm_ke17z and frdm_ke17z512.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-08 06:07:51 -04:00
Anke Xiao
f253d36f5d soc: nxp: kinetis: ke1xz: enable spi clock
Add lpspi clock configuration for frdm_ke17z and frdm_ke17z512.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-08 06:07:51 -04:00
Anke Xiao
878d417020 dts: arm: nxp: nxp_ke1xz.dtsi: add lpspi and dma support
Add spi and dma dts configurations information for frdm_ke17z and
frdm_ke17z512 boards.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-08 06:07:51 -04:00
Dino Li
c3a4a1a0f6 drivers: intc_ite_it8xxx2: disable debug mode then reset for tests
After flashed EC image, we needed to manually press the reset button
on it8xxx2_evb. Now, without pressing the button, we can disable
debug mode and trigger a watchdog hard reset for running tests.

After flash EC, running below tests can pass (without pressing the button):
west build -p always -b it8xxx2_evb tests/drivers/watchdog/wdt_basic_api
west build -p always -b it8xxx2_evb tests/kernel/timer/timer_api
west build -p always -b it8xxx2_evb tests/kernel/fatal/exception

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2024-08-08 06:07:35 -04:00
Jonathan Rico
58ec51616d Bluetooth: host: fix incorrect ISO HCI fragmentation logic
Don't push the TS flag on `buf` itself.

This messes up the MTU calculations: a packet that would exactly fit the
MTU and has a timestamp would be unnecessarily fragmented.

The MTU check is done on `buf` as a whole. At the point where the
fragmentation length is decided, `buf` includes one extra byte to pass the
TS bit around. That byte shouldn't count towards the MTU.

Instead, infer the presence of the timestamp by inspecting the amount of
headroom that the buffer has. This works because we always reserve
enough memory to push the timestamp, but not always push a timestamp on
the buffer. #tightlycoupled

This method is slightly uglier IMO, but eases MTU confusion and doesn't
rely on user_data.

Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
2024-08-08 06:07:08 -04:00
Jonathan Rico
76ece09cb4 Bluetooth: Host: Add ISO HCI fragmentation test
Purpose is to verify we don't fragment ISO SDUs when they should fit the
controller's MTU.

Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
2024-08-08 06:07:08 -04:00
Richard Wheatley
4af3d1005b drivers: pinctrl: updated to add interrupt direction
Updated to add pinctrl interrupt direction

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-08-08 06:06:21 -04:00
Richard Wheatley
2db45fca9c soc: ambiq: apollo4x: pinctrl updates
Updated to add more pinctrl facilities

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-08-08 06:06:21 -04:00
Richard Wheatley
edcfef92a5 drivers: pinctrl: updated to add interrupt direction
Updated to add pinctrl interrupt direction

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-08-08 06:06:21 -04:00
Manuel Argüelles
f89a2def84 tests: drivers: spi: remove overlay for mr_canhubk3
This overlay is no longer needed, as presently there are more test
scenarios covering all combinations of DMA and SPY_ASYNC support for
LPSPI peripheral.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-08-08 06:06:03 -04:00
Manuel Argüelles
fc9a6685f1 soc: nxp: s32: s32k3: add missing EDMA kconfig option
This option is used by some tests to filter by EDMA support.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-08-08 06:06:03 -04:00
Manuel Argüelles
903f591317 west: pull fixes for mr_canhubk3 dma driver
Update manifest to pull fixes for mr_canhubk3 DMA driver.

Fixes #76708

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Signed-off-by: Manuel Argüelles <marguelles.dev@gmail.com>
2024-08-08 06:06:03 -04:00
Sadik Ozer
c44abdf5b7 boards: adi: Enable TRNG driver for MAX326662EVKIT
TRNG enabled for MAX32662EVKIT board

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-07 19:04:26 -04:00
Furkan Akkiz
2c703e7547 tests: drivers: gpio: Enable gpio driver tests for max32662evkit board
Enable gpio driver test for MAX32662EVKIT

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
2024-08-07 19:04:26 -04:00
Sadik Ozer
fa0d08c70a boards: Add MAX32662EVKIT board
Add MAX32662EVKIT board files
For more information about this board please check
https://www.analog.com/

Co-authored-by: Maureen Helm <maureen.helm@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-07 19:04:26 -04:00
Sadik Ozer
7323757e36 soc: Add the MAX32662 SoC
Add MAX32662 Kconfig and dts files

Co-authored-by: Maureen Helm <maureen.helm@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-07 19:04:26 -04:00
Sadik Ozer
a091a5b301 manifest: Update hal_adi to remove .shared section
The .shared and .mailbox sections are for the dual-core parts
and do not exist for the MAX32662

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-07 19:04:26 -04:00
Krzysztof Chruściński
5bd6050241 testsuite: busy_sim: Add alarm cancelation to stop function
Without cancelation next start may return error.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-08-07 19:04:04 -04:00
Krzysztof Chruściński
42f003cebd testsuite: busy_sim: Allow running with timer random generator
Allow to run with timer random generator which does not need any
entropy device.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-08-07 19:04:04 -04:00
Krzysztof Chruściński
28b4bab01c kernel: fatal: Fix NO_OPTIMIZATIONS build
When logging is on and optimization and multithreading is off then
build fails to link because unoptimized compiler/linker seems to not
look beyond the function and it fails trying to link k_thread_name_get.
Reworking the code to make it known to the compiler without optimization
that k_thread_name_get is not needed and not logging current thread
name in that case.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-08-07 19:03:40 -04:00
Francois Ramu
c8e1fdf296 soc: stm32 devices have lower tick with lower sysclock
For stm32 platforms where the sysclock is less or equal to
32MHz, the Ticks per second is reduced to 8000 (instead of
10000).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2024-08-07 19:03:18 -04:00
Benedikt Schmidt
d561b50695 tests: drivers: flash: stm32: add nucleo_f746zg
Add the nucleo_f746zg to the tests for the flash driver.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-08-07 19:02:49 -04:00
Benedikt Schmidt
f8399bd773 drivers: flash: implement RDP for STM32F7
Implement the readout protection for the STM32F7 series.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-08-07 19:02:49 -04:00
Benedikt Schmidt
db2261b6f5 drivers: flash: reduce redundancy in RDP implementation on STM32
Reduce the redundancy in the readout protection implementation
on STM32 MCUs.

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2024-08-07 19:02:49 -04:00
Kapil Bhatt
2f088fabc2 net: wifi: Add Current PHY rate
Current PHY rate
It represents the current PHY rate of transfer
of data in bits per second. It will a TX data rate.

Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
2024-08-07 19:02:32 -04:00
Kapil Bhatt
459a63b137 net: wifi: Add over run count statistics
Over run count
It represents the number of packets dropped either at
received and sent due to lack of buffer memory to retain
all packets on the network interface.

Signed-off-by: Kapil Bhatt <kapil.bhatt@nordicsemi.no>
2024-08-07 19:02:32 -04:00
Glenn Andrews
15db23223a samples: SMF: LVGL: SMF-based Calculator
This sample crates a touchscreen desk calculator based on
the sample state machine in _Practical UML Statecharts in
C/C++_ by Miro Samek.

Sample should build and run on any touchscreen-enabled
board with sufficient resources.

Tested on `disco_l475_iot1` board with
`adafruit_2_8_tft_touch_v2` touchscreen.

Signed-off-by: Glenn Andrews <glenn.andrews.42@gmail.com>
2024-08-07 19:02:15 -04:00
Grzegorz Swiderski
56d241bd48 soc: nordic: Validate PPR CLIC address
Add a missing entry in `validate_base_addresses.c`.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-08-07 19:01:55 -04:00
Grzegorz Swiderski
79b0154f5e dts: nordic: Remove cpu property from VPR nodes
It's a superfluous value which used to be required by tooling, but now
we can remove it.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-08-07 19:01:55 -04:00
Grzegorz Swiderski
fa2240ba31 dts: nordic: nrf54h20: Fix PPR CLIC address
Between SoC revisions, the address was moved from 0x5F909000 in the
global domain, to 0xF0000000 in PPR's private address space.

Move the corresponding DT node out of `cpuppr_vpr` range to a separate
bus node, which is considered inaccessible to all cores but `cpuppr`.
This is expressed by selectively leaving out the `simple-bus` compatible
and `ranges` property, i.e., they're only set in `nrf54h20_cpuppr.dtsi`.

This lets the interrupt controller node remain visible at system level,
for the purpose of describing IRQ mappings between cores in devicetree.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-08-07 19:01:55 -04:00
Dawid Niedzwiecki
a6b409f02a boards: google_dragonclaw: enable rng module
Enable the rng module for the google_dragonclaw board by default.

The RNG module is always used anyway and it helps with running tests
that needs entropy.

Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
2024-08-07 19:01:36 -04:00
Alvis Sun
421ca39cf0 divers: clock_control: npcx: HFCBCD3 in CDCG is only available in npcx4
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
2024-08-07 19:01:18 -04:00
Yong Cong Sin
87b95be52a arch: riscv: ARCH_STACK_PTR_ALIGN should be 4 for RV32E
Stack alignment for RV32E is 4 bytes

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-07 19:00:53 -04:00
Yong Cong Sin
0787744684 tests: arch: common: stack_unwind: add qemu_riscv32e
qemu_riscv32e uses a different ISA and is kinda special, add it
to the testcase for better coverage.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-08-07 19:00:53 -04:00
Herman Berget
af314643a3 manifest: Update hal_nordic with nonsecure PPIB fix
Secure PPIB instances were accessed even when building for nonsecure

Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
2024-08-07 08:40:28 -07:00
Anas Nashif
d590c18672 intel_adsp: ace: call soc_num_cpus_init early
Restore order of execution. Code that was run in EARLY init level is now
too late.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-07 13:50:53 +02:00
Anas Nashif
c79bbfadbb xtensa: move arch_kernel_init code into prep_c
arch_kernel_init() was misused for all architecture initialization code
that is done in prep_c and prior to cstart on other architectures.
arch_kernel_init() is late in the init process and comes after EARLY
init level, making xtensa have a very special boot path.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-07 13:50:53 +02:00
Anas Nashif
dbfbf0edba xtensa: adapt soc code to use prep_c
Many xtensa target jump from soc code directly into cstart and depend on
architecture code being initialized in arch_kernel_init(). Instead of
jumping to cstart, jump to newly introduced prep_c similar to all other
architectures, where common platfotm initialization will happen.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-07 13:50:53 +02:00
Anas Nashif
42396735bf xtensa: introduce prep_c for xtensa
xtensa is the only architecutre doing thing differently and introduces
inconsistency in the init process and dependencies as we attemp to
cleanup init levels and remove misused of SYS_INIT.

Introduce prep_c for this architecture and align with other
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-07 13:50:53 +02:00
Anas Nashif
299dddfdce xtensa: remove mention of crt0-app.S
crt0-app.S does not exist, remove it from comments to avoid confusion.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-07 13:50:53 +02:00
Gerard Marull-Paretas
dbb5e57555 samples: drivers: mbox: fix nRF54H20 cpuapp<>cpuflpr channel regex
Bellboard channel used by the sample is 14, not 18.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-07 13:50:44 +02:00