Commit Graph

7 Commits

Author SHA1 Message Date
Emilio Benavente
82a192c8a9 boards: nxp: Removing CONFIG_PINCTRL from the boards defconfig
The Drivers using Pinctrl should be turning Pinctrl on
this should not be the responsibility of the board. This
commit removes CONFIG_PINCTRL from the boards side for nxp boards.

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
2024-10-15 19:09:45 -04:00
Manuel Argüelles
d2ba31d503 drivers: intc: nxp: convert wkpu to native driver
Convert NXP WKPU to a native driver, all existing functionalities are
retained.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-08-02 15:14:33 -05:00
Manuel Argüelles
6c7d836b0c drivers: nxp: convert SIUL2 drivers to native
Convert pin control, GPIO and external interrupt controller drivers
based on SIUL2 peripheral to native drivers. This must be done in a
single commit to preserve atomicity, as these drivers depend on each
other.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2024-07-31 10:08:24 +02:00
Manuel Argüelles
c8a5cf6728 intc: add NXP S32 WKPU interrupt controller driver
Introduce an interrupt controller for the NXP S32 WKPU peripheral
that can be integrated with GPIO to trigger interrupts through
external interrupt pad inputs.

WKPU can trigger interrupts from certain input pads that support this
function, as well as wake-up events to the power management domain. This
patch only adds WKPU functionality as an interrupt controller to extend
the number of input pads that can interrupt the core. Power management
functionalities are not supported.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-10-11 16:38:34 +01:00
Manuel Argüelles
ca3310145f drivers: select nocache only when supported
NOCACHE_MEMORY depends on ARCH_HAS_NOCACHE_MEMORY_SUPPORT, so
don't try to select the symbol if not supported.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-09-26 15:09:51 +02:00
Duong Vu Nam
b24f4625f0 arch: support nocache for Cortex-R52
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.

Enable nocache in each driver use it.

Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
2022-12-12 10:39:31 +01:00
Dat Nguyen Duy
607358b084 drivers: interrupt_controller: initial support for NXP S32Z27 EIRQ
Add initial support for the NXP S32Z27 SIUL2 External
Interrupt Controller. Each SIUL2 node has a child node
will act as an interrupt-controller that processes external
interrupt signals.

This driver is required to manage GPIO interrupts.

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-04 17:44:08 -04:00