Transition nrf54h away from the soc specific gpd
(global power domain) driver which mixed power domains, pinctrl
and gpio pin retention into a non scalable solution, forcing soc
specific logic to bleed into nrf drivers.
The new solution uses zephyrs PM_DEVICE based power domains to
properly model the hardware layout of device and pin power domains,
and moves pin retention logic out of drivers into pinctrl and
gpio, which are the components which manage pins (pads).
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Introduce the NRF GPIO Pad Group device driver and binding. The
pad group device represents the GPIO pads (pins), contrary to a
GPIO controller, which is one of the many devices which can be
muxed to pads in the pad group.
The pad group belong to a power domain, which is not neccesarily the
same power domain as devices being muxed to the pads, like GPIO or
UART. If no ACTIVE device is using any of the pads in the pad
group, the pad groups power domain may be SUSPENDED. Before the pad
groups power domain is SUSPENDED, pad config retention must be
enabled to prevent the pads from loosing their state. That's what
this device driver manages. Once retained, the pad configs and
outputs are locked, even when their power domain is SUSPENDED.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Incomplete iso IN/OUT is just informative and its occurrence does not
prevent the endpoint from actually transmitting/receiving data. Such
"late" isochronous transfers, which are perfectly fine according to USB
specification, were observed on Windows host with nRF54H20 running
explicit feedback sample operating at High-Speed.
The incorrect handling manifested itself with "ISO RX buffer too small"
error message. The faulty scenario was:
* incompISOIN handler does not find any matching endpoint
* incompISOOUT handler disables endpoint, discards buffer and sets
rearm flag
* next DWC2 interrupt handler iteration after reading GINTSTS
* XferCompl interrupt on iso IN endpoint
* XferCompl interrupt on iso OUT endpoint
- transfer was actually happening to the buffer discarded in
incompISOOUT handler
- XferCompl handler modified the next buffer
* GOUTNakEff interrupt, iso OUT endpoint EPDIS bit is set
* EPDisbld interrupt, rearm flag set
- the buffer modified by XferCompl is used and fails because it is
not large enough
Modify the sequence so it accounts for host actions and the above faulty
scenario no longer causes any problems.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rearm isochronous endpoints when handling incomplete iso out interrupt
to make it possible to rearm the endpoint in time (before SOF),
especially when operating at High-Speed.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Remove build warning when building the posix_arch_console driver with
CONFIG_PRINTK=n and CONFIG_STDOUT_CONSOLE=n.
Fixes: #93790
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add NETC block driver, it could do some block memory region MMIO mapping
and also so dome block initialization, moved some netc related
configuration form board_init() to block driver so that it could be reused
between different platforms, although some configuration is different for
different platform, but put all NETC related code in the same driver to
make it easier to be maintained.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC v3 ITS is initialized in pre-kernel stage in which sleep function
can't work yet, so use busy delay in pre-kernel stage and use sleep
delay in post-kernel stage.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
For RDbase used by its command, When GITS_TYPER.PTA = 1, physicall address
is used, the RDbase field consist of bits[51:16] of the address, so need
to left shift the address by 16 bits. But when GITS_TYPER.PTA = 0, PE
number is used, no need to shit anymore.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC redistributor on Some platform are connected to a non-coherent
downstream interconnect, it need to use Non-cahable and Non-shareable
access atttributes to access external memory. And also flush the
data cache after CPU update related memory.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Move control endpoint enable/disable calls to udc_enable()/udc_disable().
It does not change much during USB device support initialization, but
it seems to resolve an issue when starting from RAM, though the real
cause is unknown.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
Update the driver to support DMA operations on L4 series devices, with
a shared DMA channel. Split channels do not work on these chips, since
there is no dedicated TX and RX channels on the DMA, so configuring two
channels with SDMMC as the peripheral results in a non-functional
configuration.
Fixes#91216.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add a helper function that constructs a rtio SQE chain with the purpose
to perform a bus read operation on a list of registers.
Usage:
struct rtio_regs regs;
struct rtio_reg_list regs_list[] = {{regs_addr1, mem_addr_1, mem_len_1},
{regs_addr2, mem_addr_2, mem_len_2},
...
};
regs.rtio_regs_list = regs_list;
regs.rtio_regs_num = ARRAY_SIZE(regs_list);
rtio_read_regs_async(rtio,
iodev,
RTIO_BUS_SPI,
®s,
sqe,
dev,
op_cb);
Signed-off-by: Armando Visconti <armando.visconti@st.com>
• Supports led_on/off, led_set_brightness (0–100 %, 152 Hz default),
and led_blink (7 ms – 1.685 s) with automatic sharing of the two
on-chip PWM engines; returns –EBUSY when a third distinct pair is
requested.
• Includes basic runtime-PM boilerplate to honour power-domain control;
the device itself has no dedicated low-power states.
Signed-off-by: Van Petrosyan <van.petrosyan@sensirion.com>
1. Update nxp irtc driver to fix issue in init and alarm function.
2. Update RTC device tree binding to support "share-counter".
3. Update RT700 dtsi to support rtc0 for cpu0 and rtc1 for cpu1.
4. Update readme.
5. Update unit test project conf for RT700.
Signed-off-by: Holt Sun <holt.sun@nxp.com>
The driver gets FMC bank address using
`FMC_BANK1_<parent_register_value>` define.
This approach has some flaws:
- The parent (bank) register's value might not correspond
sequentially to the expected bank number.
For example: `STM32_FMC_NOSRAM_BANK3` maps to `FMC_BANK1_4`,
instead of `FMC_BANK1_3`.
- Some families don't even define the necessary `FMC_BANK1_x` macros.
To address this, the commit adds an optional `bank-address` property,
providing a direct way to define the FMC bank address for the driver.
Signed-off-by: Georgij Černyšiov <geo.cgv@gmail.com>
Otherwise, a previous firmware build could have run into the chip and
keep led control enabled in spite of disabling it through
dts-property.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
LTDC interrupt routine is used to reload frame buffer pointer
once full frame is finished flushing. As long as there is no
need to change buffer - there is no need to disturb CPU.
Thus: Enable LTDC interrupt only when new buffer is pending
Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
Keep IW610 kconfig same as RW612, as it has similar Wi-Fi FW.
Remove NXP_WIFI_CAU_TEMPERATURE as it's not used.
NXP_WIFI_MEM_ACCESS, NXP_WIFI_REG_ACCESS and NXP_WIFI_OWE should not be
enabled by default.
Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
Added the below config to overide default calibration data and
select 2Ant Isolation.
NXP_OVERRIDE_CALIBRATION_DATA
WLAN_CALDATA_2ANT_HI_ISO
WLAN_CALDATA_2ANT_LO_ISO
Signed-off-by: Kavita Sharma <kavita.sharma_1@nxp.com>
When using DMA for SPI communication, the WS2812 SPI buffer should be
placed in the __nocache section to ensure it resides in uncached memory,
which is typically required for DMA operations.
Signed-off-by: Arthur Gay <arthur.gay@marshmallow.kids>
Initially phy_link_callback_set got called before iface init got set.
Moving to iface_init, fixes an issue that mac would set interface to up
even though it was down because startup phy down callback didn't got
through.
Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com>
In case of a busy environment and if STA is far, then we see many
retries for the frames that cause the RPU to be awake though host has
de-asserted wakeup_now signal, this leads to WDT interrupt and host
thinks that it has given sleep opportunity to RPU and initiates a
recovery.
To handle this, increase the sleep opportunity window to 5s to cover all
the retries, this solves the false recovery problem. While at it, also
increase the range, no reason to limit to lower window. And update the
help text with the warning about power consumption.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Add build asserts for "memory-regions" property in nrf drivers which is
required on targets with DMM for saadc, pdm, pwm, twim, twim_rtio, twis,
tdm, uarte, spim and spis. On targets where the property is not required
the assertion macro expands to nothing.
Signed-off-by: Michał Bainczyk <michal.bainczyk@nordicsemi.no>
Cleaned up the flash_rpi_pico driver to improve code readability and
compliance with Zephyr coding standards. Fixed inconsistent indentation
across the file and removed variables that were declared but not used.
A few improvements are credited to Manu3l0us.
Signed-off-by: Hanan Arshad <hananarshad619@gmail.com>
The Raspberry Pi Pico 2 uses a QMI flash controller, which differs from the
SSI controller used in the original Pico. Zephyr already has support for
the SSI controller, but lacked support for QMI.
This change adds the QMI flash controller implementation in the
flash_rpi_pico.c driver file. Additionally, the RP2350 SoC devicetree file
(rp2350.dtsi) has been updated to enable and describe the flash controller
for Pico 2.
Signed-off-by: Hanan Arshad <hananarshad619@gmail.com>
Remove extra-parentheses when operator precedence is implicit.
Eliminate implicit integer to boolean conversions.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Usually, drivers failing to initialize throw a message in the log,
signaling the cause of failure. Add it to this driver so the user
isn't confused by no message yet the device being marked as disabled.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Fix condition in which alarm stops working after a certain amount
of time. Hardware timer is 54-bit, yet it is treated as 32-bit by
the counter driver. To allow alarm event by hardware comparators,
counter high word must be loaded into the register along with
the lower word managed by the driver.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Fix Coverity issue CID 363738 (CWE-120): A potential buffer overflow could
occur in fcx_mldx5_uart_send() due to unchecked memcpy() when copying
command data into a fixed-size frame buffer.
This patch ensures that the length of the data being copied validated
against the remaining buffer size to prevent overruns. Also replaces a
redundant strlen() call with the precomputed cmd_data_len.
Fixes: #92634
Signed-off-by: sudarsan N <sudarsansamy2002@gmail.com>
Addressing low-hanging fruits.
Put in a separate commit in order to make it easier to keep track of
changes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
