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boards: arm: apollo4p_blue_kxr_evb: Move the bt-spi instance to soc dts

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Since the pins of bt-spi instance are wired internally in the chip, it will
make sense to move the definition to soc dts so no need for every board
using the chip to redefine the same.

Signed-off-by: Aaron Ye <aye@ambiq.com>
This commit is contained in:
Aaron Ye 2024-01-11 11:37:52 +08:00 committed by Fabio Baltieri
parent 8042e73915
commit ca8ee0e029
2 changed files with 13 additions and 12 deletions
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11
boards/arm/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts
View File

@ -87,20 +87,9 @@
};
&iom4 {
compatible = "ambiq,spi";
pinctrl-0 = <&spi4_default>;
pinctrl-names = "default";
cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
clock-frequency = <DT_FREQ_M(24)>;
status = "okay";
bt-hci@0 {
compatible = "ambiq,bt-hci-spi";
reg = <0>;
irq-gpios = <&gpio32_63 21 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio32_63 23 GPIO_ACTIVE_LOW>;
clkreq-gpios = <&gpio32_63 20 GPIO_ACTIVE_HIGH>;
};
};
&mspi0 {

14
dts/arm/ambiq/ambiq_apollo4p_blue.dtsi
View File

@ -160,13 +160,25 @@
ambiq,pwrcfg = <&pwrcfg 0x4 0x10>;
};
iom4: iom@40054000 {
iom4: spi@40054000 {
/* IOM4 works as SPI and is wired internally for BLE HCI. */
compatible = "ambiq,spi";
reg = <0x40054000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <10 0>;
cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
clock-frequency = <DT_FREQ_M(24)>;
status = "disabled";
ambiq,pwrcfg = <&pwrcfg 0x4 0x20>;
bt-hci@0 {
compatible = "ambiq,bt-hci-spi";
reg = <0>;
irq-gpios = <&gpio32_63 21 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio32_63 23 GPIO_ACTIVE_LOW>;
clkreq-gpios = <&gpio32_63 20 GPIO_ACTIVE_HIGH>;
};
};
iom5: iom@40055000 {