soc: GR716A LEON3FT Microcontroller
This adds support for the GR716A fault-tolerant LEON3 microcontroller. Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
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dts/sparc/gr716a.dtsi
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89
dts/sparc/gr716a.dtsi
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/*
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* Copyright (c) 2020 Cobham Gaisler AB
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "skeleton.dtsi"
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/ {
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dram: ram@30000000 {
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/* tightly coupled data RAM */
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reg = <0x30000000 0x00010000>;
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};
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iram: ram@31000000 {
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/* tightly coupled instruction RAM */
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reg = <0x31000000 0x00020000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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interrupt-parent = <&irqmp>;
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irqmp: irqmp0@80002000 {
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compatible = "gaisler,irqmp";
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reg = <0x80002000 0x400>;
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eirq = <1>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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timer0: gptimer@80003000 {
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compatible = "gaisler,gptimer";
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interrupts = <9>;
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reg = <0x80003000 0x100>;
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};
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uart0: apbuart@80300000 {
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compatible = "gaisler,apbuart";
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interrupts = <24>;
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reg = <0x80300000 0x100>;
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label = "UART_0";
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status = "disabled";
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};
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uart1: apbuart@80301000 {
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compatible = "gaisler,apbuart";
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interrupts = <25>;
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reg = <0x80301000 0x100>;
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label = "UART_1";
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status = "disabled";
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};
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uart2: apbuart@80302000 {
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compatible = "gaisler,apbuart";
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interrupts = <3>;
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reg = <0x80302000 0x100>;
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label = "UART_2";
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status = "disabled";
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};
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uart3: apbuart@80303000 {
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compatible = "gaisler,apbuart";
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interrupts = <5>;
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reg = <0x80303000 0x100>;
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label = "UART_3";
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status = "disabled";
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};
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uart4: apbuart@80304000 {
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compatible = "gaisler,apbuart";
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interrupts = <6>;
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reg = <0x80304000 0x100>;
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label = "UART_4";
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status = "disabled";
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};
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uart5: apbuart@80305000 {
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compatible = "gaisler,apbuart";
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interrupts = <7>;
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reg = <0x80305000 0x100>;
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label = "UART_5";
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status = "disabled";
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};
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};
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};
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3
soc/sparc/gr716a/CMakeLists.txt
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3
soc/sparc/gr716a/CMakeLists.txt
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# SPDX-License-Identifier: Apache-2.0
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zephyr_sources(../leon3/idle.c)
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16
soc/sparc/gr716a/Kconfig.defconfig
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soc/sparc/gr716a/Kconfig.defconfig
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# Copyright (c) 2019-2020 Cobham Gaisler AB
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# SPDX-License-Identifier: Apache-2.0
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if SOC_GR716A
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config SOC
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default "gr716a"
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config SPARC_NWIN
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default 31
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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int
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default 50000000
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endif
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7
soc/sparc/gr716a/Kconfig.soc
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soc/sparc/gr716a/Kconfig.soc
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# Copyright (c) 2019-2020 Cobham Gaisler AB
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# SPDX-License-Identifier: Apache-2.0
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config SOC_GR716A
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bool "GR716A LEON3 fault-tolerant microcontroller"
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select SPARC
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select SOC_SPARC_LEON
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42
soc/sparc/gr716a/linker.ld
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soc/sparc/gr716a/linker.ld
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/*
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* Copyright (c) 2019-2020 Cobham Gaisler AB
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Linker command/script file
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*
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* Linker script for GR716A
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*/
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/*
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* GR716A memory map
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*
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* LENGTH values represent the maximum possible. All memory regions may not be
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* available on all systems. bootprom, RAM and SRAM are always available.
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*/
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MEMORY
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{
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bootprom (rx) : ORIGIN = 0x00000000, LENGTH = 4K
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extprom (rx) : ORIGIN = 0x01000000, LENGTH = 16M
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spi0 (rx) : ORIGIN = 0x02000000, LENGTH = 32M
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spi1 (rx) : ORIGIN = 0x04000000, LENGTH = 32M
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RAM (rw) : ORIGIN = 0x30000000, LENGTH = 64K
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SRAM (x) : ORIGIN = 0x31000000, LENGTH = 128K
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extram (rwx) : ORIGIN = 0x40000000, LENGTH = 256M
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/* refer to include/linker/inlist.ld */
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IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
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}
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REGION_ALIAS("REGION_TEXT", SRAM);
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REGION_ALIAS("REGION_RODATA", RAM);
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REGION_ALIAS("REGION_DATA_VMA", RAM);
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REGION_ALIAS("REGION_DATA_LMA", RAM);
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REGION_ALIAS("REGION_BSS", RAM);
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#define ROMABLE_REGION RAM
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#define RAMABLE_REGION RAM
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#include <arch/sparc/linker.ld>
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10
soc/sparc/gr716a/soc.h
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10
soc/sparc/gr716a/soc.h
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/*
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* Copyright (c) 2019-2020 Cobham Gaisler AB
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __SOC_H__
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#define __SOC_H__
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#endif /* __SOC_H__ */
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