diff --git a/dts/sparc/gr716a.dtsi b/dts/sparc/gr716a.dtsi
new file mode 100644
index 00000000000..5e7fc622c59
--- /dev/null
+++ b/dts/sparc/gr716a.dtsi
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2020 Cobham Gaisler AB
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+	dram: ram@30000000 {
+		/* tightly coupled data RAM */
+		reg = <0x30000000 0x00010000>;
+	};
+
+	iram: ram@31000000 {
+		/* tightly coupled instruction RAM */
+		reg = <0x31000000 0x00020000>;
+	};
+
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges;
+		interrupt-parent = <&irqmp>;
+
+		irqmp: irqmp0@80002000 {
+			compatible = "gaisler,irqmp";
+			reg = <0x80002000 0x400>;
+			eirq = <1>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+		};
+
+		timer0: gptimer@80003000 {
+			compatible = "gaisler,gptimer";
+			interrupts = <9>;
+			reg = <0x80003000 0x100>;
+		};
+
+		uart0: apbuart@80300000 {
+			compatible = "gaisler,apbuart";
+			interrupts = <24>;
+			reg = <0x80300000 0x100>;
+			label = "UART_0";
+			status = "disabled";
+		};
+
+		uart1: apbuart@80301000 {
+			compatible = "gaisler,apbuart";
+			interrupts = <25>;
+			reg = <0x80301000 0x100>;
+			label = "UART_1";
+			status = "disabled";
+		};
+
+		uart2: apbuart@80302000 {
+			compatible = "gaisler,apbuart";
+			interrupts = <3>;
+			reg = <0x80302000 0x100>;
+			label = "UART_2";
+			status = "disabled";
+		};
+
+		uart3: apbuart@80303000 {
+			compatible = "gaisler,apbuart";
+			interrupts = <5>;
+			reg = <0x80303000 0x100>;
+			label = "UART_3";
+			status = "disabled";
+		};
+
+		uart4: apbuart@80304000 {
+			compatible = "gaisler,apbuart";
+			interrupts = <6>;
+			reg = <0x80304000 0x100>;
+			label = "UART_4";
+			status = "disabled";
+		};
+
+		uart5: apbuart@80305000 {
+			compatible = "gaisler,apbuart";
+			interrupts = <7>;
+			reg = <0x80305000 0x100>;
+			label = "UART_5";
+			status = "disabled";
+		};
+	};
+};
diff --git a/soc/sparc/gr716a/CMakeLists.txt b/soc/sparc/gr716a/CMakeLists.txt
new file mode 100644
index 00000000000..746570b05c7
--- /dev/null
+++ b/soc/sparc/gr716a/CMakeLists.txt
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_sources(../leon3/idle.c)
diff --git a/soc/sparc/gr716a/Kconfig.defconfig b/soc/sparc/gr716a/Kconfig.defconfig
new file mode 100644
index 00000000000..6feb4ff3d6a
--- /dev/null
+++ b/soc/sparc/gr716a/Kconfig.defconfig
@@ -0,0 +1,16 @@
+# Copyright (c) 2019-2020 Cobham Gaisler AB
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_GR716A
+
+config SOC
+	default "gr716a"
+
+config SPARC_NWIN
+	default 31
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	int
+	default 50000000
+
+endif
diff --git a/soc/sparc/gr716a/Kconfig.soc b/soc/sparc/gr716a/Kconfig.soc
new file mode 100644
index 00000000000..e0a1d9a398f
--- /dev/null
+++ b/soc/sparc/gr716a/Kconfig.soc
@@ -0,0 +1,7 @@
+# Copyright (c) 2019-2020 Cobham Gaisler AB
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_GR716A
+	bool "GR716A LEON3 fault-tolerant microcontroller"
+	select SPARC
+	select SOC_SPARC_LEON
diff --git a/soc/sparc/gr716a/linker.ld b/soc/sparc/gr716a/linker.ld
new file mode 100644
index 00000000000..b795a5a4fe2
--- /dev/null
+++ b/soc/sparc/gr716a/linker.ld
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019-2020 Cobham Gaisler AB
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * @brief Linker command/script file
+ *
+ * Linker script for GR716A
+ */
+
+/*
+ * GR716A memory map
+ *
+ * LENGTH values represent the maximum possible. All memory regions may not be
+ * available on all systems. bootprom, RAM and SRAM are always available.
+ */
+MEMORY
+{
+  bootprom (rx)  : ORIGIN = 0x00000000, LENGTH = 4K
+  extprom  (rx)  : ORIGIN = 0x01000000, LENGTH = 16M
+  spi0     (rx)  : ORIGIN = 0x02000000, LENGTH = 32M
+  spi1     (rx)  : ORIGIN = 0x04000000, LENGTH = 32M
+  RAM      (rw)  : ORIGIN = 0x30000000, LENGTH = 64K
+  SRAM     (x)   : ORIGIN = 0x31000000, LENGTH = 128K
+  extram   (rwx) : ORIGIN = 0x40000000, LENGTH = 256M
+  /* refer to include/linker/inlist.ld */
+  IDT_LIST (wx)  : ORIGIN = 0xFFFFF7FF, LENGTH = 2K
+}
+
+REGION_ALIAS("REGION_TEXT", SRAM);
+REGION_ALIAS("REGION_RODATA", RAM);
+REGION_ALIAS("REGION_DATA_VMA", RAM);
+REGION_ALIAS("REGION_DATA_LMA", RAM);
+REGION_ALIAS("REGION_BSS", RAM);
+
+#define ROMABLE_REGION RAM
+#define RAMABLE_REGION RAM
+
+#include <arch/sparc/linker.ld>
diff --git a/soc/sparc/gr716a/soc.h b/soc/sparc/gr716a/soc.h
new file mode 100644
index 00000000000..c5676bfbcd1
--- /dev/null
+++ b/soc/sparc/gr716a/soc.h
@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2019-2020 Cobham Gaisler AB
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __SOC_H__
+#define __SOC_H__
+
+#endif /* __SOC_H__ */