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arch: arm: cortex_m: handle multi-level interrupts in irq init

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Multi-level interrupts should be handled in irq init. Only level1
interrupts going directly to interrupt controller need to be
initialized.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
This commit is contained in:
Yangbo Lu 2025-01-14 15:12:21 +08:00 committed by Benjamin Cabé
parent b4f2553cd8
commit 627a3b83cd
1 changed files with 5 additions and 0 deletions
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5
arch/arm/core/cortex_m/irq_init.c
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@ -27,7 +27,12 @@ void z_arm_interrupt_init(void)
{
int irq = 0;
/* CONFIG_2ND_LVL_ISR_TBL_OFFSET could be treated as total number of level1 interrupts */
#if defined(CONFIG_MULTI_LEVEL_INTERRUPTS) && defined(CONFIG_2ND_LVL_ISR_TBL_OFFSET)
for (; irq < CONFIG_2ND_LVL_ISR_TBL_OFFSET; irq++) {
#else
for (; irq < CONFIG_NUM_IRQS; irq++) {
#endif
NVIC_SetPriority((IRQn_Type)irq, _IRQ_PRIO_OFFSET);
}
}