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drivers: clock_control: fix PLL input frequency

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Correct PLL input frequency calculation to consider
HSI clock divider in clock_stm32_ll_h7.c file.
For sake of simplicity, use PLLSRC_FREQmacro that
already considers the HSI clock divider when applicable.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
This commit is contained in:
Khaoula Bidani 2025-07-01 14:09:15 +02:00 committed by Daniel DeGrasse
parent 05616c51b6
commit 618044ed78
1 changed files with 6 additions and 11 deletions
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17
drivers/clock_control/clock_stm32_ll_h7.c
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@ -217,17 +217,12 @@ static uint32_t get_pllout_frequency(uint32_t pllsrc_freq,
__unused
static uint32_t get_pllsrc_frequency(void)
{
switch (LL_RCC_PLL_GetSource()) {
case LL_RCC_PLLSOURCE_HSI:
return STM32_HSI_FREQ;
case LL_RCC_PLLSOURCE_CSI:
return STM32_CSI_FREQ;
case LL_RCC_PLLSOURCE_HSE:
return STM32_HSE_FREQ;
case LL_RCC_PLLSOURCE_NONE:
default:
return 0;
}
/* M4 is not expected to call this function */
#ifdef CONFIG_CPU_CORTEX_M7
return PLLSRC_FREQ;
#else
return 0;
#endif
}
__unused