clock: driver/clock_control: Add sai clock support for syscon.

Add sai clock support for syscon.

Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
This commit is contained in:
Qiang Zhang 2024-05-31 13:30:25 +08:00 committed by Benjamin Cabé
parent 4cc76e8a9a
commit 436f3dc65e
2 changed files with 18 additions and 0 deletions

View File

@ -412,6 +412,21 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(const struct device *de
#endif
#endif /* CONFIG_MEMC_MCUX_FLEXSPI */
#if defined(CONFIG_I2S_MCUX_SAI)
case MCUX_SAI0_CLK:
#if (FSL_FEATURE_SOC_I2S_COUNT == 1)
*rate = CLOCK_GetSaiClkFreq();
#else
*rate = CLOCK_GetSaiClkFreq(0);
#endif
break;
#if (FSL_FEATURE_SOC_I2S_COUNT == 2)
case MCUX_SAI1_CLK:
*rate = CLOCK_GetSaiClkFreq(1);
break;
#endif
#endif /* CONFIG_I2S_MCUX_SAI */
#ifdef CONFIG_ETH_NXP_ENET_QOS
case MCUX_ENET_QOS_CLK:
*rate = CLOCK_GetFreq(kCLOCK_BusClk);

View File

@ -115,4 +115,7 @@
#define MCUX_XSPI1_CLK MCUX_LPC_CLK_ID(0x15, 0x01)
#define MCUX_XSPI2_CLK MCUX_LPC_CLK_ID(0x15, 0x02)
#define MCUX_SAI0_CLK MCUX_LPC_CLK_ID(0x16, 0x00)
#define MCUX_SAI1_CLK MCUX_LPC_CLK_ID(0x16, 0x01)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */