From 436f3dc65e42bb1ee64098b19c196a475f9bd489 Mon Sep 17 00:00:00 2001 From: Qiang Zhang Date: Fri, 31 May 2024 13:30:25 +0800 Subject: [PATCH] clock: driver/clock_control: Add sai clock support for syscon. Add sai clock support for syscon. Signed-off-by: Qiang Zhang --- drivers/clock_control/clock_control_mcux_syscon.c | 15 +++++++++++++++ .../dt-bindings/clock/mcux_lpc_syscon_clock.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/drivers/clock_control/clock_control_mcux_syscon.c b/drivers/clock_control/clock_control_mcux_syscon.c index d26565b1a94..d9af2574fbf 100644 --- a/drivers/clock_control/clock_control_mcux_syscon.c +++ b/drivers/clock_control/clock_control_mcux_syscon.c @@ -412,6 +412,21 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(const struct device *de #endif #endif /* CONFIG_MEMC_MCUX_FLEXSPI */ +#if defined(CONFIG_I2S_MCUX_SAI) + case MCUX_SAI0_CLK: +#if (FSL_FEATURE_SOC_I2S_COUNT == 1) + *rate = CLOCK_GetSaiClkFreq(); +#else + *rate = CLOCK_GetSaiClkFreq(0); +#endif + break; +#if (FSL_FEATURE_SOC_I2S_COUNT == 2) + case MCUX_SAI1_CLK: + *rate = CLOCK_GetSaiClkFreq(1); + break; +#endif +#endif /* CONFIG_I2S_MCUX_SAI */ + #ifdef CONFIG_ETH_NXP_ENET_QOS case MCUX_ENET_QOS_CLK: *rate = CLOCK_GetFreq(kCLOCK_BusClk); diff --git a/include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h b/include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h index 32e0e228653..274d0632fa0 100644 --- a/include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h +++ b/include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h @@ -115,4 +115,7 @@ #define MCUX_XSPI1_CLK MCUX_LPC_CLK_ID(0x15, 0x01) #define MCUX_XSPI2_CLK MCUX_LPC_CLK_ID(0x15, 0x02) +#define MCUX_SAI0_CLK MCUX_LPC_CLK_ID(0x16, 0x00) +#define MCUX_SAI1_CLK MCUX_LPC_CLK_ID(0x16, 0x01) + #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */