boards: seeed: Add xiao_rp2040 board
Adds xiao_rp2040 board built off rpi_pico Currently only uf2 flash supported Signed-off-by: Tim Lovett <timo614@gmail.com>
This commit is contained in:
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19
boards/seeed/xiao_rp2040/Kconfig.defconfig
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19
boards/seeed/xiao_rp2040/Kconfig.defconfig
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# Copyright (c) 2023 Seeed Studio inc.
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_XIAO_RP2040
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config RP2_FLASH_W25Q080
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default y
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if I2C_DW
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config I2C_DW_CLOCK_SPEED
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default 125
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endif # I2C_DW
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config USB_SELF_POWERED
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default n
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endif # BOARD_XIAO_RP2040
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7
boards/seeed/xiao_rp2040/Kconfig.xiao_rp2040
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7
boards/seeed/xiao_rp2040/Kconfig.xiao_rp2040
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# XIAO RP2040 board configuration
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# Copyright (c) 2023 Seeed Studio inc.
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_XIAO_RP2040
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select SOC_RP2040
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5
boards/seeed/xiao_rp2040/board.cmake
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5
boards/seeed/xiao_rp2040/board.cmake
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(uf2 "--board-id=RPI-RP2")
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include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake)
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5
boards/seeed/xiao_rp2040/board.yml
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5
boards/seeed/xiao_rp2040/board.yml
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board:
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name: xiao_rp2040
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vendor: seeed
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socs:
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- name: rp2040
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BIN
boards/seeed/xiao_rp2040/doc/img/xiao_rp2040.webp
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BIN
boards/seeed/xiao_rp2040/doc/img/xiao_rp2040.webp
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Binary file not shown.
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After Width: | Height: | Size: 34 KiB |
BIN
boards/seeed/xiao_rp2040/doc/img/xiao_rp2040_pinout.webp
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BIN
boards/seeed/xiao_rp2040/doc/img/xiao_rp2040_pinout.webp
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Binary file not shown.
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After Width: | Height: | Size: 30 KiB |
138
boards/seeed/xiao_rp2040/doc/index.rst
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138
boards/seeed/xiao_rp2040/doc/index.rst
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.. _xiao_rp2040:
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XIAO RP2040
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###########
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Overview
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********
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The XIAO RP2040 is an IoT mini development board from Seeed Studio.
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It is equipped with an RP2040 SoC, an on-board WS2812 addressable
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LED, and USB connector. The USB bootloader allows it
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to be flashed without any adapter, in a drag-and-drop manner.
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For more details see the `Seeed Studio XIAO RP2040`_ wiki page.
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.. figure:: img/xiao_rp2040.webp
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:align: center
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:alt: XIAO RP2040
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XIAO RP2040
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Hardware
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********
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The Seeed Studio XIAO RP2040 is a low-power microcontroller that
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carries the powerful Dual-core RP2040 processor with a flexible
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clock running up to 133 MHz. There is also 264KB of SRAM, and 2MB of
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on-board Flash memory.
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There are 14 GPIO PINs on Seeed Studio XIAO RP2040, on which there
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are 11 digital pins, 4 analog pins, 11 PWM Pins,1 I2C interface,
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1 UART interface, 1 SPI interface, 1 SWD Bonding pad interface.
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Supported Features
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==================
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The ``xiao_rp2040`` board target supports the following hardware
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features:
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.. list-table::
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:header-rows: 1
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* - Peripheral
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- Kconfig option
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- Devicetree compatible
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* - NVIC
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- N/A
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- :dtcompatible:`arm,v6m-nvic`
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* - UART
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- :kconfig:option:`CONFIG_SERIAL`
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- :dtcompatible:`raspberrypi,pico-uart`
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* - GPIO
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- :kconfig:option:`CONFIG_GPIO`
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- :dtcompatible:`raspberrypi,pico-gpio`
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* - ADC
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- :kconfig:option:`CONFIG_ADC`
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- :dtcompatible:`raspberrypi,pico-adc`
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* - I2C
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- :kconfig:option:`CONFIG_I2C`
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- :dtcompatible:`snps,designware-i2c`
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* - SPI
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- :kconfig:option:`CONFIG_SPI`
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- :dtcompatible:`raspberrypi,pico-spi`
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* - USB Device
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- :kconfig:option:`CONFIG_USB_DEVICE_STACK`
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- :dtcompatible:`raspberrypi,pico-usbd`
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* - HWINFO
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- :kconfig:option:`CONFIG_HWINFO`
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- N/A
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* - Watchdog Timer (WDT)
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- :kconfig:option:`CONFIG_WATCHDOG`
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- :dtcompatible:`raspberrypi,pico-watchdog`
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* - PWM
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- :kconfig:option:`CONFIG_PWM`
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- :dtcompatible:`raspberrypi,pico-pwm`
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* - Flash
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- :kconfig:option:`CONFIG_FLASH`
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- :dtcompatible:`raspberrypi,pico-flash-controller`
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* - Clock controller
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- :kconfig:option:`CONFIG_CLOCK_CONTROL`
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- :dtcompatible:`raspberrypi,pico-clock-controller`
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* - UART (PIO)
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- :kconfig:option:`CONFIG_SERIAL`
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- :dtcompatible:`raspberrypi,pico-uart-pio`
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Pin Mapping
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===========
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The peripherals of the RP2040 SoC can be routed to various pins on the board.
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The configuration of these routes can be modified through DTS. Please refer to
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the datasheet to see the possible routings for each peripheral.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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.. rst-class:: rst-columns
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- UART0_TX : P0
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- UART0_RX : P1
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- I2C1_SDA : P6
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- I2C1_SCL : P7
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- SPI0_RX : P4
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- SPI0_SCK : P2
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- SPI0_TX : P3
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Connections and IOs
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===================
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The board uses a standard XIAO pinout, the default pin mapping is the following:
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.. figure:: img/xiao_rp2040_pinout.webp
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:align: center
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:alt: XIAO RP2040 Pinout
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XIAO RP2040 Pinout
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Programming and Debugging
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*************************
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Flashing
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========
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Using UF2
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---------
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You can flash the Xiao RP2040 with a UF2 file.
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By default, building an app for this board will generate a
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:file:`build/zephyr/zephyr.uf2` file. If the Xiao RP2040 is powered on with
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the ``BOOTSEL`` button pressed, it will appear on the host as a mass storage
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device. The UF2 file should be copied to the device, which will
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flash the Xiao RP2040.
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References
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**********
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.. target-notes::
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.. _`Seeed Studio XIAO RP2040`: https://wiki.seeedstudio.com/XIAO-RP2040/
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34
boards/seeed/xiao_rp2040/seeed_xiao_connector.dtsi
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34
boards/seeed/xiao_rp2040/seeed_xiao_connector.dtsi
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/*
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* Copyright (c) 2023 Seeed Studio inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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xiao_d: connector {
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compatible = "seeed,xiao-gpio";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map
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= <0 0 &gpio0 26 0> /* D0 */
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, <1 0 &gpio0 27 0> /* D1 */
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, <2 0 &gpio0 28 0> /* D2 */
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, <3 0 &gpio0 29 0> /* D3 */
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, <4 0 &gpio0 6 0> /* D4 */
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, <5 0 &gpio0 7 0> /* D5 */
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, <6 0 &gpio0 0 0> /* D6 */
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, <7 0 &gpio0 1 0> /* D7 */
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, <8 0 &gpio0 2 0> /* D8 */
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, <9 0 &gpio0 4 0> /* D9 */
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, <10 0 &gpio0 3 0> /* D10 */
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;
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};
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};
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xiao_i2c: &i2c1 {
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};
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xiao_spi: &spi0 {
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};
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xiao_serial: &uart0 {
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};
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68
boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi
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boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi
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/*
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* Copyright (c) 2021 Yonatan Schachter
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* Copyright (c) 2023 Seeed Studio inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/rpi-pico-rp2040-pinctrl.h>
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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pinmux = <UART0_TX_P0>;
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};
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group2 {
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pinmux = <UART0_RX_P1>;
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input-enable;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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pinmux = <I2C1_SDA_P6>;
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input-enable;
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};
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group2 {
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pinmux = <I2C1_SCL_P7>;
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input-enable;
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};
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};
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pwm_ch4b_default: pwm_ch4b_default {
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group1 {
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pinmux = <PWM_4B_P25>;
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};
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};
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spi0_default: spi0_default {
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group1 {
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pinmux = <SPI0_TX_P3>;
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};
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group2 {
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pinmux = <SPI0_RX_P4>;
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input-enable;
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};
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group3 {
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pinmux = <SPI0_SCK_P2>;
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};
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};
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adc_default: adc_default {
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group1 {
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pinmux = <ADC_CH0_P26>,
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<ADC_CH1_P27>,
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<ADC_CH2_P28>,
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<ADC_CH3_P29>;
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input-enable;
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};
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};
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clocks_default: clocks_default {
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};
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ws2812_pio0_default: ws2812_pio0_default {
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ws2812 {
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pinmux = <PIO0_P12>;
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};
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};
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};
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174
boards/seeed/xiao_rp2040/xiao_rp2040.dts
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174
boards/seeed/xiao_rp2040/xiao_rp2040.dts
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/*
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* Copyright (c) 2021 Yonatan Schachter
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* Copyright (c) 2023 Seeed Studio inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <rpi_pico/rp2040.dtsi>
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#include "xiao_rp2040-pinctrl.dtsi"
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#include "seeed_xiao_connector.dtsi"
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#include <freq.h>
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#include <zephyr/dt-bindings/led/led.h>
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#include <zephyr/dt-bindings/pwm/pwm.h>
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/ {
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,flash-controller = &ssi;
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,code-partition = &code_partition;
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};
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aliases {
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watchdog0 = &wdt0;
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led-strip = &ws2812;
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pwm-led0 = &pwm_led0;
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led0 = &blue_led;
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led1 = &green_led;
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led2 = &red_led;
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};
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pwm_leds {
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compatible = "pwm-leds";
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status = "disabled";
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pwm_led0: pwm_led_0 {
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pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
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label = "PWM_LED";
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};
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};
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leds {
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compatible = "gpio-leds";
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blue_led: blue_led {
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gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
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label = "BLUE_LED";
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};
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green_led: green_led {
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gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
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label = "GREEN_LED";
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};
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red_led: red_led {
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gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
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label = "RED_LED";
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};
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};
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};
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&pwm {
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pinctrl-0 = <&pwm_ch4b_default>;
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pinctrl-names = "default";
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divider-int-0 = <255>;
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};
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&flash0 {
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/*
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* 2MB of flash minus the 0x100 used for the second stage bootloader
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*/
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reg = <0x10000000 DT_SIZE_M(2)>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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code_partition: partition@100 {
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label = "code";
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reg = <0x100 (DT_SIZE_M(2) - 0x100)>;
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read-only;
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};
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};
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};
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&clocks {
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pinctrl-0 = <&clocks_default>;
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pinctrl-names = "default";
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};
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&timer {
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status = "okay";
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};
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&uart0 {
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current-speed = <115200>;
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status = "okay";
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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&i2c1 {
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status = "okay";
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pinctrl-0 = <&i2c1_default>;
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pinctrl-names = "default";
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clock-frequency = <I2C_BITRATE_FAST>;
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};
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&spi0 {
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status = "okay";
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pinctrl-0 = <&spi0_default>;
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pinctrl-names = "default";
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clock-frequency = <DT_FREQ_M(8)>;
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};
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&gpio0 {
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status = "okay";
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/*
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* The neopixel on this board has its positive side hooked up to a GPIO pin
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* rather than a positive voltage rail to save on power. This will enable
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* the LED on board initialization.
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*/
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neopixel-power-enable {
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gpio-hog;
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gpios = <11 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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};
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&wdt0 {
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status = "okay";
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};
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&adc {
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status = "okay";
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pinctrl-0 = <&adc_default>;
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pinctrl-names = "default";
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};
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&pio0 {
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status = "okay";
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pio-ws2812 {
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compatible = "worldsemi,ws2812-rpi_pico-pio";
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status = "okay";
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pinctrl-0 = <&ws2812_pio0_default>;
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pinctrl-names = "default";
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bit-waveform = <3>, <3>, <4>;
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ws2812: ws2812 {
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status = "okay";
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gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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chain-length = <1>;
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color-mapping = <LED_COLOR_ID_GREEN
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LED_COLOR_ID_RED
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LED_COLOR_ID_BLUE>;
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reset-delay = <280>;
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frequency = <800000>;
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};
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};
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};
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zephyr_udc0: &usbd {
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status = "okay";
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};
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&vreg {
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regulator-always-on;
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regulator-allowed-modes = <REGULATOR_RPI_PICO_MODE_NORMAL>;
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};
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24
boards/seeed/xiao_rp2040/xiao_rp2040.yaml
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24
boards/seeed/xiao_rp2040/xiao_rp2040.yaml
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identifier: xiao_rp2040
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name: XIAO RP2040
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type: mcu
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arch: arm
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flash: 2048
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ram: 256
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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supported:
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- uart
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- gpio
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- adc
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- i2c
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- spi
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- hwinfo
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- watchdog
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- pwm
|
||||
- flash
|
||||
- dma
|
||||
- counter
|
||||
- clock
|
||||
vendor: seeed
|
||||
21
boards/seeed/xiao_rp2040/xiao_rp2040_defconfig
Normal file
21
boards/seeed/xiao_rp2040/xiao_rp2040_defconfig
Normal file
@ -0,0 +1,21 @@
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=125000000
|
||||
CONFIG_RESET=y
|
||||
|
||||
# Enable UART driver
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_UART_INTERRUPT_DRIVEN=y
|
||||
|
||||
# Enable console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# Enable clock control by default
|
||||
CONFIG_CLOCK_CONTROL=y
|
||||
|
||||
# Code partition needed to target the correct flash range
|
||||
CONFIG_USE_DT_CODE_PARTITION=y
|
||||
|
||||
# Output UF2 by default, native bootloader supports it.
|
||||
CONFIG_BUILD_OUTPUT_UF2=y
|
||||
13
samples/basic/blinky_pwm/boards/xiao_rp2040.overlay
Normal file
13
samples/basic/blinky_pwm/boards/xiao_rp2040.overlay
Normal file
@ -0,0 +1,13 @@
|
||||
&{/pwm_leds} {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_led0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm {
|
||||
status = "okay";
|
||||
divider-frac-4 = <15>;
|
||||
divider-int-4 = <255>;
|
||||
};
|
||||
4
samples/basic/fade_led/boards/xiao_rp2040.overlay
Normal file
4
samples/basic/fade_led/boards/xiao_rp2040.overlay
Normal file
@ -0,0 +1,4 @@
|
||||
&pwm {
|
||||
status = "okay";
|
||||
divider-int-4 = <255>;
|
||||
};
|
||||
2
samples/drivers/led_strip/boards/xiao_rp2040.conf
Normal file
2
samples/drivers/led_strip/boards/xiao_rp2040.conf
Normal file
@ -0,0 +1,2 @@
|
||||
CONFIG_GPIO=y
|
||||
CONFIG_GPIO_HOGS=y
|
||||
32
tests/drivers/adc/adc_api/boards/xiao_rp2040.overlay
Normal file
32
tests/drivers/adc/adc_api/boards/xiao_rp2040.overlay
Normal file
@ -0,0 +1,32 @@
|
||||
/*
|
||||
* Copyright (c) 2023 Benjamin Björnsson <benjamin.bjornsson@gmail.com>
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/ {
|
||||
zephyr,user {
|
||||
io-channels = <&adc 0>, <&adc 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
zephyr,gain = "ADC_GAIN_1";
|
||||
zephyr,reference = "ADC_REF_INTERNAL";
|
||||
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
|
||||
zephyr,resolution = <12>;
|
||||
};
|
||||
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
zephyr,gain = "ADC_GAIN_1";
|
||||
zephyr,reference = "ADC_REF_INTERNAL";
|
||||
zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
|
||||
zephyr,resolution = <12>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user