diff --git a/boards/seeed/xiao_rp2040/Kconfig.defconfig b/boards/seeed/xiao_rp2040/Kconfig.defconfig new file mode 100644 index 00000000000..e2af832cdca --- /dev/null +++ b/boards/seeed/xiao_rp2040/Kconfig.defconfig @@ -0,0 +1,19 @@ +# Copyright (c) 2023 Seeed Studio inc. +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_XIAO_RP2040 + +config RP2_FLASH_W25Q080 + default y + +if I2C_DW + +config I2C_DW_CLOCK_SPEED + default 125 + +endif # I2C_DW + +config USB_SELF_POWERED + default n + +endif # BOARD_XIAO_RP2040 diff --git a/boards/seeed/xiao_rp2040/Kconfig.xiao_rp2040 b/boards/seeed/xiao_rp2040/Kconfig.xiao_rp2040 new file mode 100644 index 00000000000..8bd3d0d2d15 --- /dev/null +++ b/boards/seeed/xiao_rp2040/Kconfig.xiao_rp2040 @@ -0,0 +1,7 @@ +# XIAO RP2040 board configuration + +# Copyright (c) 2023 Seeed Studio inc. +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_XIAO_RP2040 + select SOC_RP2040 diff --git a/boards/seeed/xiao_rp2040/board.cmake b/boards/seeed/xiao_rp2040/board.cmake new file mode 100644 index 00000000000..4103e36e635 --- /dev/null +++ b/boards/seeed/xiao_rp2040/board.cmake @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(uf2 "--board-id=RPI-RP2") + +include(${ZEPHYR_BASE}/boards/common/uf2.board.cmake) diff --git a/boards/seeed/xiao_rp2040/board.yml b/boards/seeed/xiao_rp2040/board.yml new file mode 100644 index 00000000000..7eaca915972 --- /dev/null +++ b/boards/seeed/xiao_rp2040/board.yml @@ -0,0 +1,5 @@ +board: + name: xiao_rp2040 + vendor: seeed + socs: + - name: rp2040 diff --git a/boards/seeed/xiao_rp2040/doc/img/xiao_rp2040.webp b/boards/seeed/xiao_rp2040/doc/img/xiao_rp2040.webp new file mode 100644 index 00000000000..5233046000a Binary files /dev/null and b/boards/seeed/xiao_rp2040/doc/img/xiao_rp2040.webp differ diff --git a/boards/seeed/xiao_rp2040/doc/img/xiao_rp2040_pinout.webp b/boards/seeed/xiao_rp2040/doc/img/xiao_rp2040_pinout.webp new file mode 100644 index 00000000000..cb295b073d4 Binary files /dev/null and b/boards/seeed/xiao_rp2040/doc/img/xiao_rp2040_pinout.webp differ diff --git a/boards/seeed/xiao_rp2040/doc/index.rst b/boards/seeed/xiao_rp2040/doc/index.rst new file mode 100644 index 00000000000..7206e9be07f --- /dev/null +++ b/boards/seeed/xiao_rp2040/doc/index.rst @@ -0,0 +1,138 @@ +.. _xiao_rp2040: + +XIAO RP2040 +########### + +Overview +******** + +The XIAO RP2040 is an IoT mini development board from Seeed Studio. +It is equipped with an RP2040 SoC, an on-board WS2812 addressable +LED, and USB connector. The USB bootloader allows it +to be flashed without any adapter, in a drag-and-drop manner. + +For more details see the `Seeed Studio XIAO RP2040`_ wiki page. + +.. figure:: img/xiao_rp2040.webp + :align: center + :alt: XIAO RP2040 + + XIAO RP2040 + +Hardware +******** + +The Seeed Studio XIAO RP2040 is a low-power microcontroller that +carries the powerful Dual-core RP2040 processor with a flexible +clock running up to 133 MHz. There is also 264KB of SRAM, and 2MB of +on-board Flash memory. + +There are 14 GPIO PINs on Seeed Studio XIAO RP2040, on which there +are 11 digital pins, 4 analog pins, 11 PWM Pins,1 I2C interface, +1 UART interface, 1 SPI interface, 1 SWD Bonding pad interface. + +Supported Features +================== + +The ``xiao_rp2040`` board target supports the following hardware +features: + +.. list-table:: + :header-rows: 1 + + * - Peripheral + - Kconfig option + - Devicetree compatible + * - NVIC + - N/A + - :dtcompatible:`arm,v6m-nvic` + * - UART + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart` + * - GPIO + - :kconfig:option:`CONFIG_GPIO` + - :dtcompatible:`raspberrypi,pico-gpio` + * - ADC + - :kconfig:option:`CONFIG_ADC` + - :dtcompatible:`raspberrypi,pico-adc` + * - I2C + - :kconfig:option:`CONFIG_I2C` + - :dtcompatible:`snps,designware-i2c` + * - SPI + - :kconfig:option:`CONFIG_SPI` + - :dtcompatible:`raspberrypi,pico-spi` + * - USB Device + - :kconfig:option:`CONFIG_USB_DEVICE_STACK` + - :dtcompatible:`raspberrypi,pico-usbd` + * - HWINFO + - :kconfig:option:`CONFIG_HWINFO` + - N/A + * - Watchdog Timer (WDT) + - :kconfig:option:`CONFIG_WATCHDOG` + - :dtcompatible:`raspberrypi,pico-watchdog` + * - PWM + - :kconfig:option:`CONFIG_PWM` + - :dtcompatible:`raspberrypi,pico-pwm` + * - Flash + - :kconfig:option:`CONFIG_FLASH` + - :dtcompatible:`raspberrypi,pico-flash-controller` + * - Clock controller + - :kconfig:option:`CONFIG_CLOCK_CONTROL` + - :dtcompatible:`raspberrypi,pico-clock-controller` + * - UART (PIO) + - :kconfig:option:`CONFIG_SERIAL` + - :dtcompatible:`raspberrypi,pico-uart-pio` + +Pin Mapping +=========== + +The peripherals of the RP2040 SoC can be routed to various pins on the board. +The configuration of these routes can be modified through DTS. Please refer to +the datasheet to see the possible routings for each peripheral. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +.. rst-class:: rst-columns + +- UART0_TX : P0 +- UART0_RX : P1 +- I2C1_SDA : P6 +- I2C1_SCL : P7 +- SPI0_RX : P4 +- SPI0_SCK : P2 +- SPI0_TX : P3 + +Connections and IOs +=================== + +The board uses a standard XIAO pinout, the default pin mapping is the following: + +.. figure:: img/xiao_rp2040_pinout.webp + :align: center + :alt: XIAO RP2040 Pinout + + XIAO RP2040 Pinout + +Programming and Debugging +************************* + +Flashing +======== + +Using UF2 +--------- + +You can flash the Xiao RP2040 with a UF2 file. +By default, building an app for this board will generate a +:file:`build/zephyr/zephyr.uf2` file. If the Xiao RP2040 is powered on with +the ``BOOTSEL`` button pressed, it will appear on the host as a mass storage +device. The UF2 file should be copied to the device, which will +flash the Xiao RP2040. + +References +********** + +.. target-notes:: + +.. _`Seeed Studio XIAO RP2040`: https://wiki.seeedstudio.com/XIAO-RP2040/ diff --git a/boards/seeed/xiao_rp2040/seeed_xiao_connector.dtsi b/boards/seeed/xiao_rp2040/seeed_xiao_connector.dtsi new file mode 100644 index 00000000000..d0e9152cefd --- /dev/null +++ b/boards/seeed/xiao_rp2040/seeed_xiao_connector.dtsi @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2023 Seeed Studio inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + xiao_d: connector { + compatible = "seeed,xiao-gpio"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map + = <0 0 &gpio0 26 0> /* D0 */ + , <1 0 &gpio0 27 0> /* D1 */ + , <2 0 &gpio0 28 0> /* D2 */ + , <3 0 &gpio0 29 0> /* D3 */ + , <4 0 &gpio0 6 0> /* D4 */ + , <5 0 &gpio0 7 0> /* D5 */ + , <6 0 &gpio0 0 0> /* D6 */ + , <7 0 &gpio0 1 0> /* D7 */ + , <8 0 &gpio0 2 0> /* D8 */ + , <9 0 &gpio0 4 0> /* D9 */ + , <10 0 &gpio0 3 0> /* D10 */ + ; + }; +}; + +xiao_i2c: &i2c1 { +}; +xiao_spi: &spi0 { +}; +xiao_serial: &uart0 { +}; diff --git a/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi b/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi new file mode 100644 index 00000000000..0e235884bf2 --- /dev/null +++ b/boards/seeed/xiao_rp2040/xiao_rp2040-pinctrl.dtsi @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2021 Yonatan Schachter + * Copyright (c) 2023 Seeed Studio inc. + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + i2c1_default: i2c1_default { + group1 { + pinmux = ; + input-enable; + }; + group2 { + pinmux = ; + input-enable; + }; + }; + + pwm_ch4b_default: pwm_ch4b_default { + group1 { + pinmux = ; + }; + }; + + spi0_default: spi0_default { + group1 { + pinmux = ; + }; + group2 { + pinmux = ; + input-enable; + }; + group3 { + pinmux = ; + }; + }; + + adc_default: adc_default { + group1 { + pinmux = , + , + , + ; + input-enable; + }; + }; + + clocks_default: clocks_default { + }; + + ws2812_pio0_default: ws2812_pio0_default { + ws2812 { + pinmux = ; + }; + }; +}; diff --git a/boards/seeed/xiao_rp2040/xiao_rp2040.dts b/boards/seeed/xiao_rp2040/xiao_rp2040.dts new file mode 100644 index 00000000000..0a52f47d672 --- /dev/null +++ b/boards/seeed/xiao_rp2040/xiao_rp2040.dts @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2021 Yonatan Schachter + * Copyright (c) 2023 Seeed Studio inc. + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "xiao_rp2040-pinctrl.dtsi" +#include "seeed_xiao_connector.dtsi" +#include +#include +#include + +/ { + chosen { + zephyr,sram = &sram0; + zephyr,flash = &flash0; + zephyr,flash-controller = &ssi; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,code-partition = &code_partition; + }; + + aliases { + watchdog0 = &wdt0; + led-strip = &ws2812; + pwm-led0 = &pwm_led0; + led0 = &blue_led; + led1 = &green_led; + led2 = &red_led; + }; + + pwm_leds { + compatible = "pwm-leds"; + status = "disabled"; + pwm_led0: pwm_led_0 { + pwms = <&pwm 9 PWM_MSEC(20) PWM_POLARITY_INVERTED>; + label = "PWM_LED"; + }; + }; + + leds { + compatible = "gpio-leds"; + + blue_led: blue_led { + gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + label = "BLUE_LED"; + }; + + green_led: green_led { + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + label = "GREEN_LED"; + }; + + red_led: red_led { + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + label = "RED_LED"; + }; + }; +}; + +&pwm { + pinctrl-0 = <&pwm_ch4b_default>; + pinctrl-names = "default"; + divider-int-0 = <255>; +}; + +&flash0 { + /* + * 2MB of flash minus the 0x100 used for the second stage bootloader + */ + reg = <0x10000000 DT_SIZE_M(2)>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + code_partition: partition@100 { + label = "code"; + reg = <0x100 (DT_SIZE_M(2) - 0x100)>; + read-only; + }; + }; +}; + +&clocks { + pinctrl-0 = <&clocks_default>; + pinctrl-names = "default"; +}; + +&timer { + status = "okay"; +}; + +&uart0 { + current-speed = <115200>; + status = "okay"; + pinctrl-0 = <&uart0_default>; + pinctrl-names = "default"; +}; + +&i2c1 { + status = "okay"; + pinctrl-0 = <&i2c1_default>; + pinctrl-names = "default"; + clock-frequency = ; +}; + +&spi0 { + status = "okay"; + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; + clock-frequency = ; +}; + +&gpio0 { + status = "okay"; + + /* + * The neopixel on this board has its positive side hooked up to a GPIO pin + * rather than a positive voltage rail to save on power. This will enable + * the LED on board initialization. + */ + neopixel-power-enable { + gpio-hog; + gpios = <11 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&wdt0 { + status = "okay"; +}; + +&adc { + status = "okay"; + pinctrl-0 = <&adc_default>; + pinctrl-names = "default"; +}; + +&pio0 { + status = "okay"; + + pio-ws2812 { + compatible = "worldsemi,ws2812-rpi_pico-pio"; + status = "okay"; + pinctrl-0 = <&ws2812_pio0_default>; + pinctrl-names = "default"; + bit-waveform = <3>, <3>, <4>; + + ws2812: ws2812 { + status = "okay"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + chain-length = <1>; + color-mapping = ; + reset-delay = <280>; + frequency = <800000>; + }; + }; +}; + +zephyr_udc0: &usbd { + status = "okay"; +}; + +&vreg { + regulator-always-on; + regulator-allowed-modes = ; +}; diff --git a/boards/seeed/xiao_rp2040/xiao_rp2040.yaml b/boards/seeed/xiao_rp2040/xiao_rp2040.yaml new file mode 100644 index 00000000000..b2852757aa3 --- /dev/null +++ b/boards/seeed/xiao_rp2040/xiao_rp2040.yaml @@ -0,0 +1,24 @@ +identifier: xiao_rp2040 +name: XIAO RP2040 +type: mcu +arch: arm +flash: 2048 +ram: 256 +toolchain: + - zephyr + - gnuarmemb + - xtools +supported: + - uart + - gpio + - adc + - i2c + - spi + - hwinfo + - watchdog + - pwm + - flash + - dma + - counter + - clock +vendor: seeed diff --git a/boards/seeed/xiao_rp2040/xiao_rp2040_defconfig b/boards/seeed/xiao_rp2040/xiao_rp2040_defconfig new file mode 100644 index 00000000000..ef4e863884a --- /dev/null +++ b/boards/seeed/xiao_rp2040/xiao_rp2040_defconfig @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=125000000 +CONFIG_RESET=y + +# Enable UART driver +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable clock control by default +CONFIG_CLOCK_CONTROL=y + +# Code partition needed to target the correct flash range +CONFIG_USE_DT_CODE_PARTITION=y + +# Output UF2 by default, native bootloader supports it. +CONFIG_BUILD_OUTPUT_UF2=y diff --git a/samples/basic/blinky_pwm/boards/xiao_rp2040.overlay b/samples/basic/blinky_pwm/boards/xiao_rp2040.overlay new file mode 100644 index 00000000000..43e054ede94 --- /dev/null +++ b/samples/basic/blinky_pwm/boards/xiao_rp2040.overlay @@ -0,0 +1,13 @@ +&{/pwm_leds} { + status = "okay"; +}; + +&pwm_led0 { + status = "okay"; +}; + +&pwm { + status = "okay"; + divider-frac-4 = <15>; + divider-int-4 = <255>; +}; diff --git a/samples/basic/fade_led/boards/xiao_rp2040.overlay b/samples/basic/fade_led/boards/xiao_rp2040.overlay new file mode 100644 index 00000000000..62c3a142cd4 --- /dev/null +++ b/samples/basic/fade_led/boards/xiao_rp2040.overlay @@ -0,0 +1,4 @@ +&pwm { + status = "okay"; + divider-int-4 = <255>; +}; diff --git a/samples/drivers/led_strip/boards/xiao_rp2040.conf b/samples/drivers/led_strip/boards/xiao_rp2040.conf new file mode 100644 index 00000000000..8230eb9896b --- /dev/null +++ b/samples/drivers/led_strip/boards/xiao_rp2040.conf @@ -0,0 +1,2 @@ +CONFIG_GPIO=y +CONFIG_GPIO_HOGS=y diff --git a/tests/drivers/adc/adc_api/boards/xiao_rp2040.overlay b/tests/drivers/adc/adc_api/boards/xiao_rp2040.overlay new file mode 100644 index 00000000000..2bd79f9f4f1 --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/xiao_rp2040.overlay @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2023 Benjamin Björnsson + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>; + }; +}; + +&adc { + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +};