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ace: mmu: Add shared heap section

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Add a new shared_heap section. Update the xtensa_soc_mmu_ranges structure
to include a new memory range for the shared heap.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
This commit is contained in:
Adrian Warecki 2025-07-22 20:08:24 +02:00 committed by Fabio Baltieri
parent 223d23a34d
commit 0fe396cb11
2 changed files with 11 additions and 0 deletions
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3
soc/intel/intel_adsp/ace/ace-link.ld
View File

@ -499,6 +499,9 @@ SECTIONS {
/* Heap start and end markers. Used to reserve system heap memory. */
.heap_mem SEGSTART_UNCACHED (NOLOAD) :
{
_shared_heap_start = .;
*(.shared_heap_mem)
_shared_heap_end = .;
_heap_start = .;
*(.heap_mem)
} >ucram

8
soc/intel/intel_adsp/ace/mmu_ace30.c
View File

@ -24,6 +24,8 @@ extern char __cold_end[];
extern char __imr_data_start[];
extern char __imr_data_end[];
extern char __coldrodata_start[];
extern char _shared_heap_start[];
extern char _shared_heap_end[];
const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
@ -153,6 +155,12 @@ const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
.attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
.name = "lpsram",
},
{
.start = (uint32_t)_shared_heap_start,
.end = (uint32_t)_shared_heap_end,
.attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB | XTENSA_MMU_MAP_SHARED,
.name = "shared heap",
},
{
.start = (uint32_t)(ADSP_L1CC_ADDR),
.end = (uint32_t)(ADSP_L1CC_ADDR + CONFIG_MMU_PAGE_SIZE),