diff --git a/soc/intel/intel_adsp/ace/ace-link.ld b/soc/intel/intel_adsp/ace/ace-link.ld
index 9296988d428..456791eb15e 100644
--- a/soc/intel/intel_adsp/ace/ace-link.ld
+++ b/soc/intel/intel_adsp/ace/ace-link.ld
@@ -499,6 +499,9 @@ SECTIONS {
   /* Heap start and end markers. Used to reserve system heap memory. */
   .heap_mem SEGSTART_UNCACHED (NOLOAD) :
   {
+    _shared_heap_start = .;
+    *(.shared_heap_mem)
+    _shared_heap_end = .;
     _heap_start = .;
     *(.heap_mem)
   } >ucram
diff --git a/soc/intel/intel_adsp/ace/mmu_ace30.c b/soc/intel/intel_adsp/ace/mmu_ace30.c
index 29a8818cafb..6774612f211 100644
--- a/soc/intel/intel_adsp/ace/mmu_ace30.c
+++ b/soc/intel/intel_adsp/ace/mmu_ace30.c
@@ -24,6 +24,8 @@ extern char __cold_end[];
 extern char __imr_data_start[];
 extern char __imr_data_end[];
 extern char __coldrodata_start[];
+extern char _shared_heap_start[];
+extern char _shared_heap_end[];
 
 
 const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
@@ -153,6 +155,12 @@ const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
 		.attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB,
 		.name = "lpsram",
 	},
+	{
+		.start = (uint32_t)_shared_heap_start,
+		.end   = (uint32_t)_shared_heap_end,
+		.attrs = XTENSA_MMU_PERM_W | XTENSA_MMU_CACHED_WB | XTENSA_MMU_MAP_SHARED,
+		.name = "shared heap",
+	},
 	{
 		.start = (uint32_t)(ADSP_L1CC_ADDR),
 		.end   = (uint32_t)(ADSP_L1CC_ADDR + CONFIG_MMU_PAGE_SIZE),