boards: mps4: Add initial support for corstone315
What is changed?
- Add initial support for the MPS4 Corstone-315 FVP platform, including
board and SoC definitions.The qualifier to build/run application
with board mps4/corstone315 is
`mps4/corstone315/fvp` for secure and
`mps3/corstone315/fvp/ns` for non-secure.
- FVP testing with corstone315 uses the ARM FVP
`FVP_Corstone_SSE-315`.
Why do we need this change?
- This enables FVP support for corstone315.
- A separate FVP variant was added for corstone315 as the TFM board
used for non-secure variant differs for FPGA and FVP.
TFM board `arm/mps4/corstone315` support is present but no FVP support
yet. We can test this by building TF-M with
-DTFM_PLATFORM=arm/mps4/corstone315 and then lauching FVP:
FVP_Corstone_SSE-315 --data "bl1_1.bin"@0x11000000
--data "cm_provisioning_bundle.bin"@0x12024000
--data "dm_provisioning_bundle.bin"@0x1202aa00
--data "bl2_signed.bin"@0x12031400
--data "tfm_s_ns_signed.bin"@0x38000000
Signed-off-by: Shaunak saha <ssaha@tsavoritesi.com>
This commit is contained in:
Shaunak saha
Daniel DeGrasse
parent
0397a65e82
commit
05d1c3a7f0
@ -1,7 +1,7 @@
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# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_MPS4_CORSTONE320_FVP
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if BOARD_MPS4_CORSTONE315_FVP || BOARD_MPS4_CORSTONE320_FVP
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if SERIAL
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@ -10,7 +10,7 @@ config UART_INTERRUPT_DRIVEN
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endif # SERIAL
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if ROMSTART_RELOCATION_ROM && BOARD_MPS4_CORSTONE320_FVP
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if ROMSTART_RELOCATION_ROM && (BOARD_MPS4_CORSTONE315_FVP || BOARD_MPS4_CORSTONE320_FVP)
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config ROMSTART_REGION_ADDRESS
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default $(dt_nodelabel_reg_addr_hex,itcm)
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@ -3,4 +3,5 @@
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config BOARD_MPS4
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select SOC_SERIES_MPS4
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select SOC_MPS4_CORSTONE315 if BOARD_MPS4_CORSTONE315_FVP || BOARD_MPS4_CORSTONE315_FVP_NS
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select SOC_MPS4_CORSTONE320 if BOARD_MPS4_CORSTONE320_FVP || BOARD_MPS4_CORSTONE320_FVP_NS
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@ -7,10 +7,15 @@
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#
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if(CONFIG_BOARD_MPS4_CORSTONE320_FVP OR CONFIG_BOARD_MPS4_CORSTONE320_FVP_NS)
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if(CONFIG_BOARD_MPS4_CORSTONE315_FVP OR CONFIG_BOARD_MPS4_CORSTONE315_FVP_NS)
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set(SUPPORTED_EMU_PLATFORMS armfvp)
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set(ARMFVP_BIN_NAME FVP_Corstone_SSE-315)
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elseif(CONFIG_BOARD_MPS4_CORSTONE320_FVP OR CONFIG_BOARD_MPS4_CORSTONE320_FVP_NS)
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set(SUPPORTED_EMU_PLATFORMS armfvp)
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set(ARMFVP_BIN_NAME FVP_Corstone_SSE-320)
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if(CONFIG_BOARD_MPS4_CORSTONE320_FVP)
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endif()
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if(CONFIG_BOARD_MPS4_CORSTONE315_FVP OR CONFIG_BOARD_MPS4_CORSTONE320_FVP)
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set(ARMFVP_FLAGS
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# default is '0x11000000' but should match cpu<i>.INITSVTOR which is 0.
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-C mps4_board.subsystem.iotss3_systemcontrol.INITSVTOR_RST=0
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@ -19,7 +24,6 @@ if(CONFIG_BOARD_MPS4_CORSTONE320_FVP OR CONFIG_BOARD_MPS4_CORSTONE320_FVP_NS)
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# few MPU tests to fail.
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-C mps4_board.subsystem.cpu0.MPU_S=16
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)
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endif()
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endif()
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if(CONFIG_BUILD_WITH_TFM)
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@ -3,6 +3,11 @@ board:
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full_name: MPS4
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vendor: arm
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socs:
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- name: 'corstone315'
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variants:
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- name: 'fvp'
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variants:
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- name: 'ns'
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- name: 'corstone320'
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variants:
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- name: 'fvp'
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97
boards/arm/mps4/mps4_corstone315_fvp.dts
Normal file
97
boards/arm/mps4/mps4_corstone315_fvp.dts
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@ -0,0 +1,97 @@
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/*
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* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm/armv8.1-m.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <mem.h>
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/ {
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compatible = "arm,mps4-fvp";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &sram;
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zephyr,flash = &isram;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m85";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8.1m-mpu";
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reg = <0xe000ed90 0x40>;
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};
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};
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};
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ethosu {
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&nvic>;
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ethosu0: ethosu@50004000 {
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compatible = "arm,ethos-u";
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reg = <0x50004000>;
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interrupts = <16 3>;
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secure-enable;
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privilege-enable;
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status = "okay";
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};
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};
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/* We utilize the secure addresses, if you subtract 0x10000000
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* you'll get the non-secure alias
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*/
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itcm: itcm@10000000 { /* alias @ 0x0 */
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compatible = "zephyr,memory-region";
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reg = <0x10000000 DT_SIZE_K(32)>;
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zephyr,memory-region = "ITCM";
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};
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sram: sram@12000000 { /* alias @ 0x01000000 */
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x12000000 DT_SIZE_M(2)>;
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zephyr,memory-region = "SRAM";
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};
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dtcm: dtcm@30000000 { /* alias @ 0x20000000 */
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compatible = "zephyr,memory-region";
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reg = <0x30000000 DT_SIZE_K(32)>;
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zephyr,memory-region = "DTCM";
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};
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isram: sram@31000000 { /* alias @ 0x21000000 */
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x31000000 DT_SIZE_M(4)>;
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zephyr,memory-region = "ISRAM";
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};
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soc {
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peripheral@50000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x50000000 0x10000000>;
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#include "mps4_common_soc_peripheral.dtsi"
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};
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};
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};
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#include "mps4_common.dtsi"
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26
boards/arm/mps4/mps4_corstone315_fvp.yaml
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26
boards/arm/mps4/mps4_corstone315_fvp.yaml
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@ -0,0 +1,26 @@
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# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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# SPDX-License-Identifier: Apache-2.0
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identifier: mps4/corstone315/fvp
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name: Arm MPS4-Corstone315-FVP
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type: mcu
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arch: arm
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ram: 2048
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flash: 4096
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simulation:
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- name: armfvp
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exec: FVP_Corstone_SSE-315
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toolchain:
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- gnuarmemb
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- zephyr
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supported:
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- gpio
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testing:
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default: true
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timeout_multiplier: 4
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ignore_tags:
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- drivers
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- bluetooth
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- net
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- timer
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vendor: arm
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19
boards/arm/mps4/mps4_corstone315_fvp_defconfig
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19
boards/arm/mps4/mps4_corstone315_fvp_defconfig
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@ -0,0 +1,19 @@
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# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_RUNTIME_NMI=y
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CONFIG_ARM_TRUSTZONE_M=y
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CONFIG_ARM_MPU=y
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# GPIOs
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CONFIG_GPIO=y
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# Serial
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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# Build a Secure firmware image
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CONFIG_TRUSTED_EXECUTION_SECURE=y
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# ROMSTART_REGION address and size are defined in Kconfig.defconfig
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CONFIG_ROMSTART_RELOCATION_ROM=y
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102
boards/arm/mps4/mps4_corstone315_fvp_ns.dts
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102
boards/arm/mps4/mps4_corstone315_fvp_ns.dts
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@ -0,0 +1,102 @@
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/*
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* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm/armv8.1-m.dtsi>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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#include <mem.h>
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/ {
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compatible = "arm,mps4-fvp";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,sram = &ram;
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zephyr,flash = &code;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m85";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8.1m-mpu";
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reg = <0xe000ed90 0x40>;
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};
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};
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};
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/* We utilize the non-secure addresses, if you add 0x10000000
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* you'll get the secure alias
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*/
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itcm: itcm@0 {
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compatible = "zephyr,memory-region";
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reg = <0x0 DT_SIZE_K(32)>;
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zephyr,memory-region = "ITCM";
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};
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sram: sram@1000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x1000000 DT_SIZE_M(2)>;
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zephyr,memory-region = "SRAM";
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};
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dtcm: dtcm@20000000 {
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compatible = "zephyr,memory-region";
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reg = <0x20000000 DT_SIZE_K(512)>;
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zephyr,memory-region = "DTCM";
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};
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isram: sram@21000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x21000000 DT_SIZE_M(4)>;
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zephyr,memory-region = "ISRAM";
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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/* The memory regions defined below must match what the TF-M
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* project has defined for that board - a single image boot is
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* assumed. Please see the memory layout in:
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* https://git.trustedfirmware.org/plugins/gitiles/TF-M/trusted-firmware-m.git/+/HEAD/platform/ext/target/arm/mps4/common/partition/flash_layout.h
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*/
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code: memory@28080000 {
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reg = <0x28080000 DT_SIZE_K(512)>;
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};
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ram: memory@21020000 {
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reg = <0x21020000 DT_SIZE_M(1)>;
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};
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};
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soc {
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peripheral@40000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x40000000 0x10000000>;
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#include "mps4_common_soc_peripheral.dtsi"
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};
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};
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};
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#include "mps4_common.dtsi"
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15
boards/arm/mps4/mps4_corstone315_fvp_ns.yaml
Normal file
15
boards/arm/mps4/mps4_corstone315_fvp_ns.yaml
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@ -0,0 +1,15 @@
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# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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# SPDX-License-Identifier: Apache-2.0
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identifier: mps4/corstone315/fvp/ns
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name: Arm MPS4-Corstone315-FVP_ns
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type: mcu
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arch: arm
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ram: 1024
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flash: 512
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toolchain:
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- gnuarmemb
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- zephyr
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testing:
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only_tags:
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- trusted-firmware-m
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19
boards/arm/mps4/mps4_corstone315_fvp_ns_defconfig
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19
boards/arm/mps4/mps4_corstone315_fvp_ns_defconfig
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@ -0,0 +1,19 @@
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# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_ARM_TRUSTZONE_M=y
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CONFIG_RUNTIME_NMI=y
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CONFIG_ARM_MPU=y
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# GPIOs
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CONFIG_GPIO=y
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# Serial
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_SERIAL=y
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# Build a Non-secure firmware image
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CONFIG_TRUSTED_EXECUTION_SECURE=n
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CONFIG_TRUSTED_EXECUTION_NONSECURE=y
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CONFIG_BUILD_WITH_TFM=y
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@ -5,6 +5,17 @@ config SOC_SERIES_MPS4
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select ARM
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select GPIO_MMIO32 if GPIO
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config SOC_MPS4_CORSTONE315
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select CPU_CORTEX_M85
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select CPU_HAS_ARM_SAU
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select CPU_HAS_ARM_MPU
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select CPU_HAS_FPU
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select ARMV8_M_DSP
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select ARMV8_1_M_MVEI
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select ARMV8_1_M_MVEF
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select ARMV8_1_M_PMU
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select ARM_MPU_PXN if ARM_MPU
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config SOC_MPS4_CORSTONE320
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select CPU_CORTEX_M85
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select CPU_HAS_ARM_SAU
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@ -18,4 +29,5 @@ config SOC_MPS4_CORSTONE320
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config ARMV8_1_M_PMU_EVENTCNT
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int
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default 8 if SOC_MPS4_CORSTONE315
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default 8 if SOC_MPS4_CORSTONE320
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9
soc/arm/mps4/Kconfig.defconfig.mps4_corstone315
Normal file
9
soc/arm/mps4/Kconfig.defconfig.mps4_corstone315
Normal file
@ -0,0 +1,9 @@
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# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
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# SPDX-License-Identifier: Apache-2.0
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if SOC_MPS4_CORSTONE315
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config NUM_IRQS
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default 232
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endif
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@ -10,9 +10,14 @@ config SOC_SERIES_MPS4
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config SOC_SERIES
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default "mps4" if SOC_SERIES_MPS4
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config SOC_MPS4_CORSTONE315
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bool
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select SOC_SERIES_MPS4
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config SOC_MPS4_CORSTONE320
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bool
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select SOC_SERIES_MPS4
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config SOC
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default "corstone315" if SOC_MPS4_CORSTONE315
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default "corstone320" if SOC_MPS4_CORSTONE320
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@ -17,6 +17,7 @@ family:
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- name: corstone310
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- name: mps4
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socs:
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- name: corstone315
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- name: corstone320
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- name: musca
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socs:
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