Tony Han 5fa0898441 soc: microchip: sam: update MMU for sama7g5 FLEXCOM ... When the FLEXCOM is activated in the DT, configure it's register region with strong ordered, read and write access. Signed-off-by: Tony Han <tony.han@microchip.com>		2025-06-22 18:44:04 -07:00
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mec	soc: mec172x: ecia: Adjust girq_regs to avoid flexible-array-like behaviors	2025-06-18 09:25:04 -04:00
miv	soc: miv: polarfire: Increase NUM_IRQS to cover 1st and 2nd level irqs	2025-03-19 09:02:06 -04:00
sam	soc: microchip: sam: update MMU for sama7g5 FLEXCOM	2025-06-22 18:44:04 -07:00