This adds support for the SAM0 DMA Controller (DMAC). Chained transfer are not currently implemented. Tested with tests/drivers/dma/loop_transfer and custom modifications to that test using three parallel reloading channels. Also tested with a trivial program that did memory->serial. Signed-off-by: Michael Hope <mlhx@google.com> [hageman@inthat.cloud: Rebased and updated commit message] Signed-off-by: Derek Hageman <hageman@inthat.cloud> |
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| arc | ||
| arm | ||
| bindings | ||
| common | ||
| nios2 | ||
| riscv32 | ||
| x86 | ||
| xtensa | ||
| Kconfig | ||