zephyr/soc/microchip
Tony Han 5fa0898441 soc: microchip: sam: update MMU for sama7g5 FLEXCOM
When the FLEXCOM is activated in the DT, configure it's register
region with strong ordered, read and write access.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-06-22 18:44:04 -07:00
..
mec soc: mec172x: ecia: Adjust girq_regs to avoid flexible-array-like behaviors 2025-06-18 09:25:04 -04:00
miv
sam soc: microchip: sam: update MMU for sama7g5 FLEXCOM 2025-06-22 18:44:04 -07:00