zephyr/drivers/memc
Swift Tian c7ed0b6aa8 drivers: memc: Add APS6404L device driver
The APS6404L psram is a quad SDR SPI device that runs up to 100MHz.
It can provide 8MB of external RAM for SoCs that supports XIP feature.
The device driver uses MSPI bus API and could be used across
different controllers that implement the MSPI bus API.

Signed-off-by: Swift Tian <swift.tian@ambiq.com>
2024-06-14 21:07:00 -04:00
..
CMakeLists.txt drivers: memc: Add APS6404L device driver 2024-06-14 21:07:00 -04:00
Kconfig drivers: memc: Add APS6404L device driver 2024-06-14 21:07:00 -04:00
Kconfig.mcux drivers: memc: memc_mcux_flexspi: support initializing FLEXSPI when XIP 2024-05-14 18:21:57 -04:00
Kconfig.mspi drivers: memc: Add APS6404L device driver 2024-06-14 21:07:00 -04:00
Kconfig.nxp_s32
Kconfig.sam
Kconfig.sifive
Kconfig.smartbond drivers: memc: smartbond: Add support for the memory driver class. 2024-05-23 07:51:41 -04:00
Kconfig.stm32
memc_mcux_flexspi_aps6408l.c
memc_mcux_flexspi_is66wvq8m4.c drivers: memc: memc_mcux_flexspi_is66wvq8m4: do not reset FLEXSPI 2024-05-14 18:21:57 -04:00
memc_mcux_flexspi_s27ks0641.c
memc_mcux_flexspi_w956a8mbya.c
memc_mcux_flexspi.c drivers: memc: memc_mcux_flexspi: support initializing FLEXSPI when XIP 2024-05-14 18:21:57 -04:00
memc_mcux_flexspi.h drivers: memc: memc_mcux_flexspi: update documentation for flash_config 2024-05-14 18:21:57 -04:00
memc_mspi_aps6404l.c drivers: memc: Add APS6404L device driver 2024-06-14 21:07:00 -04:00
memc_nxp_flexram.c drivers: memc: Add NXP FlexRAM driver 2023-11-13 09:42:28 +01:00
memc_nxp_flexram.h drivers: memc: fix FlexRAM bank cfg issue 2024-04-10 11:28:32 -04:00
memc_nxp_s32_qspi.c treewide: Replace all uses of CONCAT with _CONCAT 2023-11-07 11:55:51 +01:00
memc_nxp_s32_qspi.h
memc_sam_smc.c
memc_smartbond_nor_psram.c drivers: memc: smartbond: Add support for the memory driver class. 2024-05-23 07:51:41 -04:00
memc_stm32_nor_psram.c
memc_stm32_sdram.c
memc_stm32_sdram.ld
memc_stm32.c drivers: memc: stm32 fmc add clock source select 2024-01-17 14:43:20 +01:00
sifive_ddr.c
sifive_ddrregs.h