Enjia Mai 2b1bccde07 tests: testsuite: add emulating send IPI in X2APIC mode ... We emulate the interrupt by sending the IPI to core itself by the local APIC for x86 platfrom. But in X2APIC mode, this no longer works. So we emulate the interrupt the by writing the IA32_X2APIC_SELF_IPI MSR to send IPI to the core itself via LOAPIC also. According to SDM vol.3 chapter 10.12.11. Fixes #42108 Signed-off-by: Enjia Mai <enjia.mai@intel.com>		2022-03-09 14:55:26 -05:00
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exti_stm32.h
gd32_exti.h	drivers: interrupt_controller: initial support for GD32 EXTI	2022-01-04 20:49:00 -05:00
gic.h	interrupt_controller: gicv3: add support for LPIs	2021-09-28 19:45:29 -04:00
gicv3_its.h	interrupt_controller: Add GICv3 ITS API	2021-09-28 19:45:29 -04:00
intc_esp32.h	esp32: drivers: interrupt_controller: add interrupt allocation support	2021-07-16 07:19:28 -04:00
intc_esp32c3.h	interrupt-controller: intc_esp32c3: make logs optional	2021-10-02 14:33:24 -04:00
intc_mchp_xec_ecia.h	Microchip: MEC172x: eSPI driver	2021-10-26 09:27:20 -04:00
intel_vtd.h	drivers/interrupt_controller: Add source id to VT-D interrupt remap	2022-01-07 10:47:27 -05:00
ioapic.h	drivers/interrupt_controller: Make IOAPIC VT-D aware when relevant	2022-01-07 10:47:27 -05:00
loapic.h	tests: testsuite: add emulating send IPI in X2APIC mode	2022-03-09 14:55:26 -05:00
sam0_eic.h
sysapic.h