zephyr/include/toolchain/common.h
Jean-Paul Etienne cd83e85edc arch: added support for the riscv32 architecture
RISC-V is an open-source instruction set architecture.
Added support for the 32bit version of RISC-V to Zephyr.

1) exceptions/interrupts/faults are handled at the architecture
   level via the __irq_wrapper handler. Context saving/restoring
   of registers can be handled at both architecture and SOC levels.
   If SOC-specific registers need to be saved, SOC level needs to
   provide __soc_save_context and __soc_restore_context functions
   that shall be accounted by the architecture level, when
   corresponding config variable RISCV_SOC_CONTEXT_SAVE is set.

2) As RISC-V architecture does not provide a clear ISA specification
   about interrupt handling, each RISC-V SOC handles it in its own
   way. Hence, at the architecture level, the __irq_wrapper handler
   expects the following functions to be provided by the SOC level:
   __soc_is_irq: to check if the exception is the result of an
                 interrupt or not.
   __soc_handle_irq: handle pending IRQ at SOC level (ex: clear
                     pending IRQ in SOC-specific IRQ register)

3) Thread/task scheduling, as well as IRQ offloading are handled via
   the RISC-V system call ("ecall"), which is also handled via the
   __irq_wrapper handler. The _Swap asm function just calls "ecall"
   to generate an exception.

4) As there is no conventional way of handling CPU power save in
   RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle
   functions just unlock interrupts and return to the caller, without
   issuing any CPU power saving instruction. Nonetheless, to allow
   SOC-level to implement proper CPU power save, nano_cpu_idle and
   nano_cpu_atomic_idle functions are defined as __weak
   at the architecture level.

Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-13 19:52:23 +00:00

119 lines
2.9 KiB
C

/*
* Copyright (c) 2010-2014 Wind River Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* @file
* @brief Common toolchain abstraction
*
* Macros to abstract compiler capabilities (common to all toolchains).
*/
/* Abstract use of extern keyword for compatibility between C and C++ */
#ifdef __cplusplus
#define EXTERN_C extern "C"
#else
#define EXTERN_C extern
#endif
/* Use TASK_ENTRY_CPP to tag task entry points defined in C++ files. */
#ifdef __cplusplus
#define TASK_ENTRY_CPP extern "C"
#endif
/*
* Generate a reference to an external symbol.
* The reference indicates to the linker that the symbol is required
* by the module containing the reference and should be included
* in the image if the module is in the image.
*
* The assembler directive ".set" is used to define a local symbol.
* No memory is allocated, and the local symbol does not appear in
* the symbol table.
*/
#ifdef _ASMLANGUAGE
#define REQUIRES(sym) .set sym ## _Requires, sym
#else
#define REQUIRES(sym) __asm__ (".set " # sym "_Requires, " # sym "\n\t");
#endif
#ifdef _ASMLANGUAGE
#define SECTION .section
#endif
/*
* If the project is being built for speed (i.e. not for minimum size) then
* align functions and branches in executable sections to improve performance.
*/
#ifdef _ASMLANGUAGE
#ifdef CONFIG_X86
#ifdef PERF_OPT
#define PERFOPT_ALIGN .balign 16
#else
#define PERFOPT_ALIGN .balign 1
#endif
#elif defined(CONFIG_ARM)
#ifdef CONFIG_ISA_THUMB
#define PERFOPT_ALIGN .balign 2
#else
#define PERFOPT_ALIGN .balign 4
#endif
#elif defined(CONFIG_ARC)
#define PERFOPT_ALIGN .balign 4
#elif defined(CONFIG_NIOS2) || defined(CONFIG_RISCV32)
#define PERFOPT_ALIGN .balign 4
#else
#error Architecture unsupported
#endif
#define GC_SECTION(sym) SECTION .text.##sym, "ax"
#endif /* _ASMLANGUAGE */
/* force inlining a function */
#if !defined(_ASMLANGUAGE)
#define ALWAYS_INLINE inline __attribute__((always_inline))
#endif
#define _STRINGIFY(x) #x
#define STRINGIFY(s) _STRINGIFY(s)
/* Indicate that an array will be used for stack space. */
#define __stack __aligned(STACK_ALIGN)
/* concatenate the values of the arguments into one */
#define _DO_CONCAT(x, y) x ## y
#define _CONCAT(x, y) _DO_CONCAT(x, y)
/* compile-time assertion that makes the build fail */
#define BUILD_ASSERT(EXPR) typedef char __build_assert_failure[(EXPR) ? 1 : -1]